diff --git a/nac3artiq/src/lib.rs b/nac3artiq/src/lib.rs index bd33c84ce..f3eef9fed 100644 --- a/nac3artiq/src/lib.rs +++ b/nac3artiq/src/lib.rs @@ -647,6 +647,9 @@ impl Nac3 { ArtiqCodeGenerator::new("attributes_writeback".to_string(), size_t, self.time_fns); let context = inkwell::context::Context::create(); let module = context.create_module("attributes_writeback"); + let target_machine = self.llvm_options.create_target_machine().unwrap(); + module.set_data_layout(&target_machine.get_target_data().get_data_layout()); + module.set_triple(&target_machine.get_triple()); let builder = context.create_builder(); let (_, module, _) = gen_func_impl( &context, diff --git a/nac3core/src/codegen/mod.rs b/nac3core/src/codegen/mod.rs index 179523695..2f4a9ec52 100644 --- a/nac3core/src/codegen/mod.rs +++ b/nac3core/src/codegen/mod.rs @@ -68,6 +68,16 @@ pub struct CodeGenLLVMOptions { pub target: CodeGenTargetMachineOptions, } +impl CodeGenLLVMOptions { + /// Creates a [`TargetMachine`] using the target options specified by this struct. + /// + /// See [`Target::create_target_machine`]. + #[must_use] + pub fn create_target_machine(&self) -> Option { + self.target.create_target_machine(self.opt_level) + } +} + /// Additional options for code generation for the target machine. #[derive(Clone, Debug, Eq, PartialEq)] pub struct CodeGenTargetMachineOptions { @@ -338,6 +348,10 @@ impl WorkerRegistry { let mut builder = context.create_builder(); let mut module = context.create_module(generator.get_name()); + let target_machine = self.llvm_options.create_target_machine().unwrap(); + module.set_data_layout(&target_machine.get_target_data().get_data_layout()); + module.set_triple(&target_machine.get_triple()); + module.add_basic_value_flag( "Debug Info Version", inkwell::module::FlagBehavior::Warning, @@ -361,6 +375,10 @@ impl WorkerRegistry { errors.insert(e); // create a new empty module just to continue codegen and collect errors module = context.create_module(&format!("{}_recover", generator.get_name())); + + let target_machine = self.llvm_options.create_target_machine().unwrap(); + module.set_data_layout(&target_machine.get_target_data().get_data_layout()); + module.set_triple(&target_machine.get_triple()); } } *self.task_count.lock() -= 1; diff --git a/nac3core/src/codegen/test.rs b/nac3core/src/codegen/test.rs index be4fa1400..85e7d2052 100644 --- a/nac3core/src/codegen/test.rs +++ b/nac3core/src/codegen/test.rs @@ -189,6 +189,8 @@ fn test_primitives() { let expected = indoc! {" ; ModuleID = 'test' source_filename = \"test\" + target datalayout = \"e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128\" + target triple = \"x86_64-unknown-linux-gnu\" ; Function Attrs: mustprogress nofree norecurse nosync nounwind readnone willreturn define i32 @testing(i32 %0, i32 %1) local_unnamed_addr #0 !dbg !4 { @@ -368,6 +370,8 @@ fn test_simple_call() { let expected = indoc! {" ; ModuleID = 'test' source_filename = \"test\" + target datalayout = \"e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128\" + target triple = \"x86_64-unknown-linux-gnu\" ; Function Attrs: mustprogress nofree norecurse nosync nounwind readnone willreturn define i32 @testing(i32 %0) local_unnamed_addr #0 !dbg !5 {