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70 Commits

Author SHA1 Message Date
whitequark f52d364806 Mollify PEP 0479. 2015-12-30 15:33:30 +08:00
whitequark 082e9e20dd compiler: do not associate SSA values with iodelay even when inlining. 
Fixes #201.
 2015-12-25 15:02:33 +08:00
whitequark 33c3b3377e ir: keep loc when copying. 2015-12-25 14:59:28 +08:00
whitequark 0395efd479 compiler: give environment types in LLVM IR readable names. 2015-12-18 23:41:51 +08:00
whitequark 8cb7844621 transforms.interleaver: unroll loops. 2015-12-17 00:52:22 +08:00
whitequark f8eaeaa43f compiler: explicitly represent loops in IR. 2015-12-16 15:33:26 +08:00
whitequark 8751d2ee6c Delay.{expr→interval}. 2015-12-16 13:57:02 +08:00
whitequark 2a82eb7219 compiler.ir: return dict from Delay.substs, not pair iterable. 2015-11-24 00:01:10 +08:00
whitequark f3da227e2d compiler.ir: change argument order for BasicBlock.insert. 2015-11-23 23:59:25 +08:00
whitequark f0fd6cd0ca compiler.algorithms.inline: implement. 2015-11-23 23:58:37 +08:00
whitequark a4525b21cf compiler.ir: print even blocks without predecessors. 2015-11-23 23:55:12 +08:00
whitequark d92b3434a0 compiler.ir: print basic blocks in reverse postorder for readability. 2015-11-23 21:44:38 +08:00
whitequark c73b2c1a78 compiler.ir: fix typo. 2015-11-23 21:21:01 +08:00
whitequark 0bf425eefa compiler.ir: maintain use lists while mutating instructions. 2015-11-23 19:18:58 +08:00
whitequark cb3b811fd7 compiler: maintain both the IR and iodelay forms of delay expressions. 
After this commit, the delay instruction (again) does not generate
any LLVM IR: all heavy lifting is relegated to the delay and delay_mu
intrinsics. When the interleave transform needs to adjust the global
timeline, it synthesizes a delay_mu intrinsnic. This way,
the interleave transformation becomes composable, as the input and
the output IR invariants are the same.

Also, code generation is adjusted so that a basic block is split off
not only after a delay call, but also before one; otherwise, e.g.,
code immediately at the beginning of a `with parallel:` branch
would have no choice but to execute after another branch has already
advanced the timeline.

This takes care of issue #1 described in 50e7b44 and is a step
to solving issue #2.
 2015-11-21 03:22:47 +08:00
whitequark 00ec574d73 transforms.interleaver: implement (without inlining). 2015-11-20 00:03:26 +08:00
whitequark de9d7eb2e4 compiler: add `delay` IR instruction. 2015-11-17 05:16:43 +03:00
whitequark fd46690cf5 compiler: make IR dumps vastly more readable. 2015-11-17 00:23:34 +03:00
whitequark b91ffa1b38 ir: fix default argument fiasco. 2015-10-14 17:02:59 +03:00
whitequark 32ce33a1f9 transforms.artiq_ir_generator: emit ir.Parallel for with parallel:. 2015-10-09 03:10:39 +03:00
whitequark 0bb793199f transforms.artiq_ir_generator: devirtualize closure calls. 2015-10-09 01:32:27 +03:00
whitequark 2ca84f9fea Highlight source range in IR dumps using colors. 2015-10-04 02:11:17 +03:00
whitequark 9b9fa1ab7c Allow embedding and RPC sending host objects. 2015-08-25 21:56:01 -07:00
whitequark a557445e05 LocalAccessValidator: assume variables with "$" in name are internal. 
Internal variables are assumed to be scoped correctly
(including not being accessed uninitialized).

This was changed from "." because artiq.compiler.embedding uses
"." in module prefix of function names.
 2015-08-22 13:56:17 -07:00
whitequark 94a2d5f5fa Implement class attribute access through instances. 2015-08-15 11:07:54 -04:00
whitequark 00efc8c636 Implement class definitions and class attribute access. 2015-08-15 09:45:16 -04:00
whitequark 8f510a4407 compiler.ir.Function: add loc field. 2015-08-10 13:14:52 +03:00
whitequark d7f9af4bb5 Fix accidentally quadratic code in compiler.ir.Function._add_name. 2015-07-29 21:36:31 +03:00
whitequark e8c107925c Implement shared object linking. 2015-07-29 20:35:16 +03:00
whitequark 2939d4f0f3 Add tests for finally clause and reraising. 2015-07-27 12:36:21 +03:00
whitequark 90be44c596 Add tests for non-exceptional control flow across finally. 2015-07-27 10:13:22 +03:00
whitequark 7c77dd317a Implement __artiq_personality. 2015-07-27 09:10:20 +03:00
whitequark ece52062f2 Implement code generation for exception handling. 2015-07-25 05:37:37 +03:00
whitequark 236d5b886a Add support for Assert. 2015-07-22 02:58:59 +03:00
whitequark ec9d40b04f Add LLVM IR generation for function calls. 2015-07-21 13:45:27 +03:00
whitequark 6f11fa6bb1 Add conversion to LLVM IR (except handling of exception handling). 2015-07-21 04:55:01 +03:00
whitequark c6cd318f19 Fix artiq.compiler.ir.BasicBlock.__repr__. 2015-07-19 16:32:33 +03:00
whitequark 2c010b10ee Remove UnaryOp ARTIQ IR instruction; rename BinaryOp to Arith. 
Everything it can express can also be expressed via Arith.
 2015-07-19 11:51:53 +03:00
whitequark ac491fae47 Add LocalAccessValidator. 2015-07-19 11:44:51 +03:00
whitequark f212ec0263 Add a trivial dead code elimination transform. 
Its purpose is to sweep up basic blocks with no predecessors,
which are annoying to handle explicitly elsewhere.
 2015-07-19 10:29:14 +03:00
whitequark 603d49dffa Add a dominator analysis. 2015-07-18 20:48:52 +03:00
whitequark 224a93fde3 Make compiler.ir.BasicBlock.predecessors much faster. 2015-07-18 20:48:11 +03:00
whitequark 8e1cc8d985 Add an explicit ARTIQ IR instruction to create a closure. 2015-07-18 09:27:34 +03:00
whitequark 5ad02d5282 Fix ARTIQ IR generation for variables declared global. 2015-07-18 09:10:41 +03:00
whitequark dde2e67c3f Add source locations to ARTIQ IR instructions. 2015-07-18 07:49:42 +03:00
whitequark e96bc3c36c Add complete IR generator. 2015-07-17 21:29:06 +03:00
whitequark 9ff9f85f19 Add accessors to instructions. 2015-07-14 22:18:38 +03:00
whitequark bdcb24108b Add basic IR generator. 2015-07-14 08:56:51 +03:00
whitequark ebe243f8d9 Add printing of SSA functions. 2015-07-13 21:08:20 +03:00
whitequark dbdd45acc5 Add missing return. 2015-07-13 20:52:55 +03:00