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1424 Commits

Author SHA1 Message Date
Robert Jördens f0ac8cb354 pipistrello: add user_led:2 for debugging w/o adapter 2015-06-29 11:30:37 -06:00
Yann Sionneau ffe1355b1a lda_controller: improve help message for --device argument 2015-06-29 19:24:55 +02:00
Yann Sionneau a73776bd72 controllers: enforce the usage of either --simulation or --device 2015-06-29 19:21:32 +02:00
Yann Sionneau 515aa96819 controllers: use --simulation for simulation 2015-06-29 13:04:01 +02:00
Robert Jördens d39382eca0 pipistrello: ext_led fifo depth 4 2015-06-28 22:06:33 -06:00
Robert Jördens 165ef20ffa pipistrello: drop rtio fifos for invisible leds 
the main board leds are all under the adapter board

also tweak fifo depths a bit in a feeble attempt to circumvent a ISE hang (par
phase 4)
 2015-06-28 21:24:57 -06:00
Robert Jördens e2cb0e107f pipistrello: really do not request xtrig 2015-06-28 21:11:41 -06:00
Robert Jördens 23eee94458 pipistrello: add notes to nist_qc1 about dds_clock 
* remove xtrig from the target as it is not usually connected (used for
  dds_clock) and ignore PMT2/BTN2 as C:15 is used for dds_clock.
* this also aligns the ttl channel numbers with kc705/nist_qc1 (two pmt
  inputs followed by 16 ttl outputs followed by leds)
 2015-06-28 20:56:12 -06:00
Robert Jördens 5442ae312f benchmarks/*: remove 
Benchmarks should be shaped as unittests and run as part of CI.
 2015-06-28 20:56:12 -06:00
Robert Jördens f7427dda39 test: make benchmarks unittest 2015-06-28 20:56:12 -06:00
Robert Jördens 593dafc118 test: hardware testbench 2015-06-28 20:55:59 -06:00
Robert Jördens 39e9e73ff3 language: allow experiments to import from artiq.language 
this way the import stanza shows what is imported: just experiment language
related components

keep the imports also at top level until experiments have transitioned

the top level __init__.py should build and expose the entire namespace of artiq
related things, like hdf5 analysis tools, frontend components (like experiment
running api), deployment tools etc.
 2015-06-28 20:52:41 -06:00
Sebastien Bourdeauducq 944bfafefa soc: support QC2 and AD9914 (untested) 2015-06-28 21:37:27 +02:00
Sebastien Bourdeauducq b6310b72db runtime: fix log formatting 2015-06-28 17:29:52 +02:00
Sebastien Bourdeauducq 85c5b157a0 test/full_stack: tolerate FP rounding errors 2015-06-27 23:52:20 +02:00
Sebastien Bourdeauducq 8b5b219a18 runtime: provide fixdfdi 2015-06-27 23:51:48 +02:00
Sebastien Bourdeauducq 3bd7f11737 update lwip 2015-06-27 22:48:41 +02:00
Sebastien Bourdeauducq 2d475e146b runtime/flash_storage: use log not printf 2015-06-27 22:47:36 +02:00
Sebastien Bourdeauducq 7d3acf4d10 Merge branch 'master' of https://github.com/m-labs/artiq 2015-06-27 21:15:24 +02:00
Sebastien Bourdeauducq a7bbcdc1ad targets/pipistrello: mon -> moninj 2015-06-27 21:15:17 +02:00
Robert Jördens 07ceed9512 artiq_flash.sh: back down on verbosity 2015-06-26 11:09:26 -06:00
Yann Sionneau c381102019 manual: fix faq item title about determining pyserial URL by serial number 2015-06-26 18:22:47 +02:00
Sebastien Bourdeauducq c71fe29792 simplify unit system and use floats by default 2015-06-26 16:34:37 +02:00
Sebastien Bourdeauducq e6a4c2fb36 dds: make it easier to specify phase 2015-06-26 12:05:11 +02:00
Robert Jördens dd2c1d1b72 travis: try again with latest conda 2015-06-25 13:50:38 -06:00
Robert Jördens 48e0a2ad37 artiq_flash: echo commands for a bit more verbosity 2015-06-25 13:28:05 -06:00
Robert Jördens 52030ab1b7 travis: export MACADDR, do not source get-xilinx 2015-06-25 13:08:56 -06:00
Robert Jördens b820b7a3e1 Revert "travis: use latest miniconda" 
Seems to segfault on travis.

This reverts commit 51eb835030.
 2015-06-25 12:56:50 -06:00
Robert Jördens 51eb835030 travis: use latest miniconda 2015-06-25 12:50:09 -06:00
Robert Jördens 1c7ab97b91 travis: cleanup unused/redundant env vars 2015-06-25 12:40:04 -06:00
Robert Jördens 31d551e619 travis: cleanup get-xilinx.sh a bit 2015-06-25 12:35:50 -06:00
Yann Sionneau 9c96ebf7d4 nist_qc2: add fmc adapter io file 2015-06-25 03:06:15 +02:00
Sebastien Bourdeauducq 064ddb48bd manual: minor fixes 2015-06-23 19:44:02 +00:00
Sebastien Bourdeauducq 4ba8951ae1 rpc: fix indentation of class docstring 2015-06-23 19:31:52 +00:00
Yann Sionneau 71721a152e artiq_rpctool: list-methods also prints class docstring 2015-06-23 18:35:32 +02:00
Yann Sionneau f0dddd9f39 manual: hwgrep is the preferred way of specifying a serial device 2015-06-23 18:14:25 +02:00
Yann Sionneau 7821d0f7c8 manual: explain how to list attached serial devices on windows/linux 2015-06-23 17:05:57 +02:00
Robert Jördens 5b3eac1d96 pipistrello: tweak fifo depths a bit 
ise being dull again, inferring all but one 64x64 fifo as bram...
minimum bram depth is 256 anyway
 2015-06-22 23:25:07 -06:00
Robert Jördens cd249b2f66 pipistrello: run at 83+1/3 MHz, cleanup CRG 2015-06-22 19:03:00 -06:00
Sebastien Bourdeauducq 9f3f9255a2 soc: increase DDS output FIFO sizes 2015-06-21 08:40:10 -06:00
Sebastien Bourdeauducq b7d976e7db ddb: fix pdq comment 2015-06-21 08:39:58 -06:00
Sebastien Bourdeauducq 8082bf14c1 Merge branch 'master' of https://github.com/m-labs/artiq 2015-06-21 07:27:47 -06:00
Robert Jördens ef96de7d26 Merge branch 'shrink-dds-wb' 
* shrink-dds-wb:
  ad9858: make wb data 8 bit wide
 2015-06-21 00:10:44 -06:00
Robert Jördens 45ec5dbe84 ad9858: make wb data 8 bit wide 
matches actual dds bus data width and saves bram
 2015-06-20 23:53:01 -06:00
Robert Jördens 07a58dc0da wavesynth: cleanup, refactor 2015-06-20 23:29:26 -06:00
Robert Jördens e94e7c6a75 examples/ddb: make rtio_frame a list (json compat) 2015-06-20 23:29:26 -06:00
Sebastien Bourdeauducq 87ea1433d3 dds: all working 2015-06-20 18:42:39 -06:00
Sebastien Bourdeauducq c8fba45db5 Merge branch 'master' of https://github.com/m-labs/artiq 2015-06-19 21:59:44 -06:00
Sebastien Bourdeauducq 827f99e7d3 gui: more digits in DDS monitor 2015-06-19 17:55:01 -06:00
Sebastien Bourdeauducq 5b607de69c Merge branch 'master' of https://github.com/m-labs/artiq 2015-06-19 17:43:24 -06:00