whitequark
75532d10aa
Display full core device backtraces.
2015-08-10 15:12:22 +03:00
whitequark
c63ec70c53
LLVMIRGenerator: emit debug information.
2015-08-10 15:11:52 +03:00
whitequark
4f02f6e667
compiler.types: make all hashable.
2015-08-10 13:15:42 +03:00
whitequark
8f510a4407
compiler.ir.Function: add loc field.
2015-08-10 13:14:52 +03:00
whitequark
22570afbda
LLVMIRGenerator: allocate less.
2015-08-10 09:12:34 +03:00
whitequark
dfc91a35f2
ARTIQIRGenerator.polymorphic_print: str([x]) uses repr(x), not str(x).
2015-08-09 20:27:04 +03:00
whitequark
f7b64db8f4
LLVMIRGenerator: fixup phis on expansion of ARTIQ instructions.
2015-08-09 20:24:16 +03:00
whitequark
d4270cf66e
Implement receiving data from RPCs.
2015-08-09 20:17:00 +03:00
whitequark
02b1543c63
Implement receiving exceptions from RPCs.
2015-08-09 16:16:41 +03:00
whitequark
8b7d38d203
Add ARTIQ_DUMP_ASSEMBLY.
2015-08-09 15:47:29 +03:00
whitequark
9c5ca2ae29
LLVMIRGenerator: add target data layout to LLVM modules.
2015-08-09 14:39:21 +03:00
whitequark
153592f1cc
Naming.
2015-08-09 02:25:58 +03:00
whitequark
b26af5df60
Implement sending RPCs.
2015-08-09 02:17:19 +03:00
whitequark
22457bc19c
Ensure uwtable is added to all generated functions.
2015-08-08 21:48:21 +03:00
whitequark
13ad9b5d08
Allow to dump ARTIQ/LLVM IR for stitched code.
2015-08-08 21:47:20 +03:00
whitequark
ee3f35c608
Improve error message on passing an argument twice.
2015-08-08 21:06:13 +03:00
whitequark
bdcf7f100b
ARTIQIRGenerator: add semantic locs to all other implicitly raised exceptions.
2015-08-08 16:26:53 +03:00
whitequark
acd8d6355f
transforms.ARTIQIRGenerator: IndexError loc should point to "[".
2015-08-08 16:18:57 +03:00
whitequark
96c770190c
Add column marker to ARTIQ exception traceback.
2015-08-08 16:09:47 +03:00
whitequark
27d2390fed
Add zero-cost exception support to runtime and host.
2015-08-08 16:01:31 +03:00
whitequark
4efae2b67d
Formatting.
2015-08-08 13:48:25 +03:00
whitequark
ecdebc0b8a
session.c: refactor.
2015-08-08 13:21:43 +03:00
whitequark
d6ab567242
coredevice.comm_*: refactor.
2015-08-07 16:44:16 +03:00
whitequark
acc97a74f0
Fix compiler.module.
2015-08-07 14:21:53 +03:00
whitequark
a7633f75c7
Show origin of expansion in diagnostics for synthesized code.
2015-08-07 13:56:18 +03:00
whitequark
50448ef554
Add support for referring to host values in embedded functions.
2015-08-07 13:24:01 +03:00
whitequark
353f454a29
Add basic support for embedded functions with new compiler.
2015-08-07 11:44:49 +03:00
whitequark
b5cf1e395d
runtime: avoid race condition when running kernel.
...
Also, don't bother passing kernel name: entry point is already
recorded in DT_INIT when the kernel is linked.
2015-08-07 08:51:33 +03:00
whitequark
1a969aa9e4
compiler.transforms.inferencer: accept and ignore @kernel decorator.
2015-08-07 07:54:35 +03:00
whitequark
7562d39750
compiler.module: split off inferencing from Module.__init__.
2015-08-06 08:25:53 +03:00
whitequark
ca52b2fdd0
compiler.transforms.ARTIQIRGenerator: fix typo.
2015-08-06 08:25:53 +03:00
whitequark
8d0222c297
Rename artiq_coreconfig → artiq_coretool; add log subcommand.
2015-08-02 16:40:43 +03:00
whitequark
62fdc75d2d
Integrate libdyld and libunwind.
...
It is currently possible to run the idle experiment, and it
can raise and catch exceptions, but exceptions are not yet
propagated across RPC boundaries.
2015-08-02 15:43:03 +03:00
whitequark
aae2923c4c
runtime: add lognonl{,_va} functions.
...
The kernels have print(), which prints aggregates (such as
arrays) piece-by-piece, and newlines would interfere.
2015-08-02 06:33:12 +03:00
whitequark
e8943a008c
Rename compiler/{targets/__init__.py → targets.py}.
2015-07-30 10:35:04 +03:00
whitequark
1e3911ed39
Use try..finally in compiler.targets.Target.link.
2015-07-30 10:33:54 +03:00
whitequark
b0185f3917
Add profiling to the performance testbench.
2015-07-29 22:23:22 +03:00
whitequark
d7f9af4bb5
Fix accidentally quadratic code in compiler.ir.Function._add_name.
2015-07-29 21:36:31 +03:00
whitequark
6d8d0ff3f5
Update performance testbench to include time spent in ARTIQ.
2015-07-29 21:28:07 +03:00
whitequark
3b5d3e2b1a
Add a performance measurement testbench.
2015-07-29 21:17:52 +03:00
whitequark
e8c107925c
Implement shared object linking.
2015-07-29 20:35:16 +03:00
whitequark
2cd25f85bf
Rename artiq.compiler.testbench.{module → signature}.
2015-07-29 14:32:34 +03:00
whitequark
3378dd57b8
Fold llvmlite patches into m-labs/llvmlite repository.
2015-07-29 13:54:00 +03:00
whitequark
fd46d8b11e
Merge branch 'master' into new-py2llvm
2015-07-29 12:52:19 +03:00
90368415a6
ttl: remove timestamp function
...
The general idea is that functions that work with absolute timestamps exist only in machine units versions, to help prevent floating point losses of precision. Time differences should be computed in machine units and then converted, e.g. mu_to_seconds(t2-t1).
This function would have had problems after ~50 days of running the device.
2015-07-29 11:11:16 +08:00
2640a57af3
test/coredevice: let output() settle longer
2015-07-28 16:20:05 -06:00
5f5227f01f
ttl: add timestamp()
2015-07-28 16:20:05 -06:00
e95b66f114
ttl: remove spurious _mu
2015-07-28 16:20:05 -06:00
fb339d294e
serdes_s6: no need to reset
2015-07-28 12:54:31 -06:00
9ac5bc52d4
rtio: add spartan6 serdes, 4x and 8x
2015-07-27 21:01:15 -06:00
whitequark
2939d4f0f3
Add tests for finally clause and reraising.
2015-07-27 12:36:21 +03:00
whitequark
a83e7e2248
Add tests for exceptional control flow.
2015-07-27 10:22:28 +03:00
whitequark
90be44c596
Add tests for non-exceptional control flow across finally.
2015-07-27 10:13:22 +03:00
whitequark
7c77dd317a
Implement __artiq_personality.
2015-07-27 09:10:20 +03:00
b1d58bd4c8
rtio: fix replace/sequence_error when fine_ts_width > 0
2015-07-27 12:22:35 +08:00
959b7a7b46
rtio: resetless -> reset_less
2015-07-27 11:46:56 +08:00
fe6a5c42df
rtio: remove unused clk_freq argument
2015-07-27 10:57:15 +08:00
5b50f5fe05
rtio/ttl_serdes_7series: use recommended OSERDES T configuration
2015-07-27 10:50:50 +08:00
whitequark
47f13bf921
Always load the personality library in JIT testbench, if available.
2015-07-27 04:44:40 +03:00
whitequark
14c7b15785
Add a test harness for exceptions.
...
The libunwind.h is duplicated here so that it would be possible
to test the Python parts without pulling in misoc.
2015-07-27 04:18:12 +03:00
whitequark
7903889082
Merge branch 'master' into new-py2llvm
2015-07-27 03:29:00 +03:00
f68d5cbd73
rtio: forward rtio domain reset to rio and rio_phy domains
2015-07-27 01:52:47 +08:00
940aa815dd
rtio/ttl_serdes: cleanup/rewrite
2015-07-27 01:44:52 +08:00
Yann Sionneau
d90dff4ef1
rtio: add SERDES TTL (WIP)
2015-07-26 17:40:34 +08:00
d14a31f443
artiq_run: fix ELF running
2015-07-25 15:52:38 +08:00
696bceb406
gui: feedback on run deletion
2015-07-25 15:08:27 +08:00
61f45f505b
gui/short_format: show string values
2015-07-25 14:37:19 +08:00
05dd11a60d
protocols/pyon: support numpy scalars ( closes #53 )
2015-07-25 12:28:56 +08:00
8bc1dd9f9c
test/serialization: remove redundant test since Quantity was removed
2015-07-25 12:23:43 +08:00
9fe65769f2
gui: add console description
2015-07-25 12:01:47 +08:00
whitequark
692791f0bd
Make sure a landing pad returns {i8*} to soothe LLVM codegen.
2015-07-25 07:01:25 +03:00
5979f85c1c
gui: use monospace font in log
2015-07-25 11:38:26 +08:00
whitequark
ece52062f2
Implement code generation for exception handling.
2015-07-25 05:37:37 +03:00
ef8b09d9bc
gui: add console
2015-07-25 00:36:16 +08:00
928775f6ac
gui: fix default LinearScan/RandomScan
2015-07-25 00:35:21 +08:00
5b62b2452d
gui: get spinboxes to behave
2015-07-25 00:32:18 +08:00
7d81520827
protocols/pc_rpc: improve docstrings
2015-07-25 00:30:36 +08:00
whitequark
c581af29d7
Merge remote-tracking branch 'origin/master' into new-py2llvm
2015-07-23 21:36:17 +03:00
6b0e120d75
wavesynth/Synthesizer: allow empty data
2015-07-23 12:34:54 -06:00
5b1165f413
gui: log autoscroll
2015-07-24 00:11:05 +08:00
1a4028ca92
gui: better log lookandfeel
2015-07-24 00:08:14 +08:00
3a06e22b67
master: handle logging while scanning repository
2015-07-23 23:06:15 +08:00
aa2acb9137
gui: auto resize of table columns
2015-07-23 22:36:52 +08:00
whitequark
20f5f8217d
Make sure tests pass both on ARTIQ Python and CPython.
...
In some cases (the `is` operator and wraparound arithmetics)
the tests will only pass on ARTIQ Python. These are conditionally
commented out.
2015-07-23 08:09:25 +03:00
whitequark
65121b437f
Rework internal logic of slices.
2015-07-23 07:57:49 +03:00
whitequark
2b9ac344d8
Verify LLVM module in compiler.textbench.jit.
2015-07-23 07:57:35 +03:00
whitequark
9db199cad9
Handle closure effects appropriately in LocalAccessValidator.
2015-07-23 03:15:36 +03:00
whitequark
acb8810e62
Add tests for lambdas and functions.
2015-07-23 03:07:30 +03:00
whitequark
f8c2709943
Make division by zero raise an exception.
2015-07-23 01:26:50 +03:00
whitequark
4cfe4ea148
Make negative and too-far shifts have defined behavior.
2015-07-23 00:58:41 +03:00
whitequark
bf60978c7b
Add bool coercion support.
2015-07-22 19:15:54 +03:00
whitequark
de181e0cb9
Revert "Require boolean operand in BoolOp."
...
This reverts commit 5d518dcec6
2015-07-22 18:35:18 +03:00
whitequark
51aef980a0
Revert "Require boolean condition in If, While, IfExp."
...
This reverts commit e21829ce74
2015-07-22 18:35:14 +03:00
whitequark
f2a6110cc4
Add integration tests for every language construct.
2015-07-22 18:34:52 +03:00
0b10f72c2b
Merge branch 'master' of https://github.com/m-labs/artiq
2015-07-22 10:44:49 +08:00
whitequark
dff4ce7e3a
Return LLVM IR module from LLVMIRGenerator.process.
2015-07-22 04:13:04 +03:00
whitequark
986d9d944f
Add artiq.compiler.testbench.run.
2015-07-22 04:10:15 +03:00
whitequark
86e006830c
Use the correct printf format for 64-bit integers.
2015-07-22 03:05:15 +03:00
whitequark
236d5b886a
Add support for Assert.
2015-07-22 02:58:59 +03:00
073e09ed36
gui: common format for results/params
2015-07-22 06:01:09 +08:00
