whitequark
739da9f1b3
runtime: print trace level log messages to UART during startup.
...
There's no way to retrieve them otherwise if the startup kernel
hangs.
This commit was mistakenly removed in 88ad054
2016-12-19 13:21:21 +00:00
whitequark
b9588ddf03
firmware: don't crash on artiq_compile'd kernels ( fixes #641 ).
2016-12-19 13:01:18 +00:00
68b2373b9a
korad_ka3005p: fix simulation mode
2016-12-19 09:49:44 +01:00
161025e7df
korad_ka3005p: use ProactorEventLoop on windows
2016-12-19 09:33:20 +01:00
d55f2bda86
korad_ka3005p: cleanup
2016-12-19 09:32:21 +01:00
jboulder
baac555f96
add device for Korad KA3005P programmable DC power supply
2016-12-19 09:31:21 +01:00
db5957a7e7
firmware: use bsp crate in ad9154
2016-12-17 11:43:29 +08:00
9a564e07c0
firmware: make libbsp a crate
2016-12-16 21:28:25 +08:00
c99388f80f
firmware: use M-Labs as author in Cargo.toml files
2016-12-16 20:14:11 +08:00
9967dfc5ca
runtime: reorganize to support DRTIO satellite firmware
2016-12-16 19:11:19 +08:00
6b998581cc
rtio: use same reset for counter_rtio whatever the interface delay is
2016-12-15 09:28:13 +08:00
15b48be6e4
test/sawg: adapt to new latency spec
2016-12-14 19:43:30 +01:00
115ea67860
fir: automatically use transposed topology
2016-12-14 19:16:07 +01:00
a451b675c9
Revert "fir: different adder layout"
...
This reverts commit 6f50e77b409c293c1905f28e69d79403a0803866.
2016-12-14 19:16:07 +01:00
93076b8efa
fir: different adder layout
2016-12-14 19:16:07 +01:00
61abd994e9
Revert "fir: force dsp48"
...
This reverts commit 0ad433832d1b6dcd803ffa086ae73b2ee0568326.
2016-12-14 19:16:07 +01:00
641d109786
fir: force dsp48
2016-12-14 19:16:07 +01:00
8381db279f
sawg: wire up all HBF outputs, latency compensation in phys, simplify
2016-12-14 19:16:07 +01:00
6cdb96c5e0
rtio: add support for latency compensation in phy
...
* if multiple RTIO channels influence the same data stream and physical
output channel (see SAWG) differential latency needs to be compensated
* this is a NOP for phys with zero delay (default)
* if delay==1, it adds one timestamp-wide register
* if delay >1, it adds one adder and one register
* latency compensation using (~10-50 deep) delay lines is about as
expensive as a single adder+register but very tedious to implement
2016-12-14 19:16:07 +01:00
7be27d7116
fir: add upsample transfer function test
2016-12-14 19:16:07 +01:00
4c27029be0
sawg: fix limit regs
2016-12-14 19:16:07 +01:00
708c25b83a
phaser: don't init rtio in startup_kernel
2016-12-14 19:16:07 +01:00
e9592105ce
drtio: fix aux controller clock domain mistakes
2016-12-14 10:16:45 +08:00
527757b471
kc705_drtio: use ad9154_fmc_ebz
2016-12-13 14:30:26 +08:00
3b5abae935
drtio: fix clock domain conflict
2016-12-13 14:19:49 +08:00
03d13d3811
phaser: dma/drtio changes
2016-12-12 17:46:36 +01:00
c63fa46430
Merge branch 'phaser2'
...
* phaser2: (157 commits)
sawg/hbf: tweak pipeline for timing
fir: register multiplier output
conda/phaser: build-depend on numpy
sawg: reduce coefficient width
sawg: fix latency
test/fir: needs mpl. don't run by default
test/sawg: patch spline
sawg: use ParallelHBFCascade to AA [WIP]
fir: add ParallelHBFCascade
fir: add ParallelFIR and test
gateware/dsp: add FIR and test
README_PHASER: update
sawg: documentation
sawg: extract spline
sawg: document
sawg: demo_2tone
sawg: round to int64
gateware/phaser -> gateware/ad9154_fmc_ebz
phaser: fix typo
sawg: merge set/set64
...
2016-12-12 17:31:39 +01:00
4b61020b27
drtio: reset more local state
2016-12-12 18:48:10 +08:00
d99e64effd
drtio: clear any stale FIFO space reply
2016-12-12 18:02:56 +08:00
4c59c0fecf
Revert "drtio: order resets wrt writes"
...
This reverts commit 9a048c2b3a
2016-12-12 17:49:07 +08:00
6a60afcba0
runtime: clear all DRTIO FIFOs first, reset remote PHYs on link init
2016-12-12 17:48:25 +08:00
8f747fa209
drtio: clear underflow and sequence error on reset
2016-12-12 17:39:14 +08:00
7196bc21c1
rtio: simplify error reset logic
...
Channel is always selected when reset is issued.
2016-12-12 17:35:10 +08:00
1c74249638
runtime: reset local DRTIO state
2016-12-12 17:30:41 +08:00
9a048c2b3a
drtio: order resets wrt writes
2016-12-12 17:18:07 +08:00
cbc49ea91d
set asyncio loop earlier in controllers ( #627 )
2016-12-12 11:38:02 +08:00
3743633b04
Revert "pc_rpc: use ProactorEventLoop on Windows ( #627 )"
...
This reverts commit 7d4297b9bb
2016-12-12 11:33:56 +08:00
09fb4869f3
runtime: centralize (D)RTIO management
2016-12-09 19:24:00 +08:00
0a9f69a3ed
kc705_drtio_master: add missing rtio_core CSRs
2016-12-09 19:23:36 +08:00
4422b6902a
runtime: silence unused variable warnings
2016-12-09 19:23:06 +08:00
bc36bda94a
perform RTIO init on comms CPU side
2016-12-09 14:16:55 +08:00
f6071a5812
sawg/hbf: tweak pipeline for timing
2016-12-08 17:00:53 +01:00
b7a308d33d
fir: register multiplier output
2016-12-08 17:00:39 +01:00
18e3f58c22
sawg: reduce coefficient width
2016-12-08 16:14:32 +01:00
598da09a93
sawg: fix latency
2016-12-08 15:53:35 +01:00
f4ceace253
test/fir: needs mpl. don't run by default
2016-12-08 15:49:50 +01:00
efc95043c4
test/sawg: patch spline
2016-12-08 15:49:23 +01:00
3eef6229cc
sawg: use ParallelHBFCascade to AA [WIP]
2016-12-08 15:32:57 +01:00
a629eb1665
fir: add ParallelHBFCascade
2016-12-08 15:30:26 +01:00
d303225249
fir: add ParallelFIR and test
2016-12-08 15:21:04 +01:00
7e0f3edca5
gateware/dsp: add FIR and test
2016-12-07 19:14:23 +01:00
4c3717932e
drtio: link layer debugging CSRs
2016-12-07 23:03:14 +08:00
5efd0fcea5
sawg: documentation
2016-12-06 19:25:40 +01:00
b311830fc4
kc705: fix drtio_aux address conflict
2016-12-06 18:28:48 +08:00
4669d3f02f
kc705_drtio_satellite: add MiSoC system, hook up auxiliary controller
2016-12-06 14:56:42 +08:00
f4b7d39a69
kc705_drtio_master: hook up auxiliary controller
2016-12-06 14:56:15 +08:00
f3c50a37ca
rtio: always read full DMA sequence
2016-12-06 01:05:47 +08:00
c413d95b49
rtio: fix DMA get_csrs
2016-12-05 18:12:09 +08:00
eb8d630148
rtio: test DMA RTIO wait state
2016-12-05 18:01:48 +08:00
b677c69faf
rtio: fix handling of o_status in DMA
2016-12-05 18:01:48 +08:00
75ea13748a
rtio: fix DMA data MSB and stop signaling, self-checking unittest
2016-12-05 18:01:48 +08:00
43a5455058
rtio: DMA unittest WIP
2016-12-05 18:01:48 +08:00
a5834765d0
rtio: more DMA fixes, better stopping mechanism
2016-12-05 18:01:48 +08:00
30bce5ad35
rtio: DMA fixes
2016-12-05 18:01:48 +08:00
74fe5c3ef0
test: make gateware simulations discoverable
2016-12-05 18:01:48 +08:00
whitequark
668928a16c
runtime: fix a lifetime issue in lwip::Pbuf.
...
This would have allowed a use-after-move (or -free) to typecheck.
2016-12-05 05:24:27 +00:00
whitequark
f68e4ae519
compiler: rein in overzealous cast monomorphization.
2016-12-05 05:08:57 +00:00
whitequark
218720cfa7
Revert "compiler: rein in overzealous cast monomorphization."
...
This reverts commit 4305903dde
2016-12-05 05:04:26 +00:00
whitequark
4305903dde
compiler: rein in overzealous cast monomorphization.
...
This caused failures on e.g. "int32(var64a >> var64b)", where
the type of the argument is already fully known, but was unified
with the result of the cast anyway.
2016-12-05 04:38:25 +00:00
whitequark
4c94873560
runtime: upgrade lwip to release 2.0.0.
2016-12-05 04:35:02 +00:00
whitequark
b5a684830d
compiler: fix parsing of TList annotations ( fixes #632 ).
2016-12-05 03:18:56 +00:00
695eb705b3
sawg: extract spline
2016-12-04 16:52:08 +01:00
39becd0b4e
sawg: document
2016-12-04 16:50:49 +01:00
88ad054ab6
Merge branch 'drtio'
2016-12-03 23:25:17 +08:00
5d145ff912
drtio: add false paths between sys and transceiver clocks
2016-12-03 23:03:01 +08:00
4b97b9f8ce
drtio: add clock constraints
2016-12-03 22:17:29 +08:00
617f6897a4
runtime: more concise message
2016-12-03 11:17:47 +08:00
d6f6ebf066
sawg: demo_2tone
2016-12-02 18:18:47 +01:00
a324f4faa1
Merge remote-tracking branch 'm-labs/master' into phaser2
...
* m-labs/master:
compiler: monomorphize int64(round(x)) to not lose precision.
2016-12-02 18:11:29 +01:00
87bd2072e8
sawg: round to int64
2016-12-02 18:07:01 +01:00
whitequark
68de724554
compiler: monomorphize int64(round(x)) to not lose precision.
...
This applies to any expression with an indeterminate integer type
cast to int64(), not just round().
2016-12-02 15:02:44 +00:00
3d4723353e
Merge branch 'master' into phaser2
...
* master:
dashboard: mention disable in CCB policies
runtime: clear async RPC queue when kernel stops (fixes #631 ).
artiq_devtool: fix incorrect use of nargs in argparse.
2016-12-02 14:12:04 +01:00
e747696aaa
Merge remote-tracking branch 'm-labs/phaser2' into phaser2
...
* m-labs/phaser2:
phaser: fix typo
2016-12-02 14:11:56 +01:00
cbf1004df3
gateware/phaser -> gateware/ad9154_fmc_ebz
2016-12-02 14:11:41 +01:00
6353f6d590
drtio: support different configurations and speeds
2016-12-02 17:22:22 +08:00
3cee269afe
phaser: fix typo
2016-12-02 11:06:45 +08:00
6e9bc7c05d
sawg: merge set/set64
2016-12-01 16:45:54 +01:00
93a853a0e0
test/sawg: non trivial coarse_ref_period
2016-12-01 16:00:06 +01:00
3931d8097b
rtio: fix DMA TimeOffset stream.connect
2016-12-01 16:43:46 +08:00
d4cb1eb998
kc705: integrate DMA
2016-12-01 16:31:00 +08:00
7c59688a12
rtio: simple DMA fixes
2016-12-01 16:30:48 +08:00
46dbc44c8f
rtio: export DMA and CRIInterconnectShared
2016-12-01 16:30:29 +08:00
6c97a97d8c
rtio: support single-master CRI arbiter
2016-12-01 16:30:11 +08:00
a318243083
rtio: CRI arbiter (untested)
2016-12-01 15:41:43 +08:00
696db32603
dashboard: mention disable in CCB policies
2016-12-01 11:47:04 +08:00
cd3f68ba76
rtio: DMA core (untested)
2016-11-30 18:43:19 +08:00
01057dfb6d
test/sawg: check 48 bit frequency
2016-11-30 11:21:25 +01:00
ea04fb2704
test/sawg: skip 2tone demo test
2016-11-30 11:02:41 +01:00
ed6d1e73cc
sawg: cleanup
2016-11-30 10:52:35 +01:00
fb58f31c9d
Revert "sawg: test w/o discrete_compensate"
...
This reverts commit b736dd0df7
2016-11-29 20:56:04 +01:00
dbf72f5fde
sawg: extend unittests
2016-11-29 20:52:51 +01:00
b736dd0df7
sawg: test w/o discrete_compensate
2016-11-29 20:52:02 +01:00
d8b5eac856
sawg: style
2016-11-29 20:51:40 +01:00
4f813c4977
test/sawg: rtio_output_wide fixes
2016-11-29 18:11:38 +01:00
d9dd79fb1a
sawg: int32 artiq python
2016-11-29 17:36:03 +01:00
4a03e3fce0
sawg: rtio_output_wide
2016-11-29 17:23:06 +01:00
f6fc7f9216
rtio: rtio_output_{list->wide}
2016-11-29 17:22:55 +01:00
313aa32779
sawg: artiq-python list scoping
2016-11-29 17:20:02 +01:00
c53040e1e4
sawg: work around #632
2016-11-29 17:01:39 +01:00
a3d9e21b8c
sawg: artiq-python changes
2016-11-29 16:58:26 +01:00
82c651c17a
phaser: remove trivial sawg demo
2016-11-29 15:40:23 +01:00
27160f5912
phaser: make sysref input only for timing
2016-11-29 15:28:10 +01:00
7816078d6b
phaser/demo: update
2016-11-29 15:11:18 +01:00
whitequark
5b7e068157
runtime: clear async RPC queue when kernel stops ( fixes #631 ).
2016-11-29 14:00:43 +00:00
d5d17aca9e
Merge remote-tracking branch 'm-labs/master' into phaser2
...
* m-labs/master:
applets: compatibility with older Qt. Closes #629
doc: update LLVM configure command (fixes #628 ).
runtime: match argument signedness between ARTIQ Python and ksupport.
runtime: refactor rtio_output_list.
runtime: use correct ABI when accepting ARTIQ lists.
2016-11-29 14:49:30 +01:00
23fd225947
sawg: spline knot packing/conversion, unittest
2016-11-29 14:49:07 +01:00
whitequark
852598c491
artiq_devtool: fix incorrect use of nargs in argparse.
2016-11-29 13:09:26 +00:00
c5b55c1dfe
applets: compatibility with older Qt. Closes #629
2016-11-29 10:45:07 +08:00
cf342eca6e
kc705_drtio_master: fix number of fine RTIO timestamp bits
2016-11-29 10:44:27 +08:00
f4c6d6eb69
kc705_drtio_master: fix number of fine RTIO timestamp bits
2016-11-28 15:18:54 +08:00
85f2467e2c
rtio: fix RTIO/DRTIO timestamp resolution discrepancy
2016-11-28 15:01:46 +08:00
9fdd29ddae
drtio: connect KernelInitiator correctly
2016-11-28 14:36:18 +08:00
5460202220
drtio: typo
2016-11-28 14:35:21 +08:00
4e1b497742
drtio: typo
2016-11-28 14:34:58 +08:00
c419c422fa
drtio: support for local RTIO core
2016-11-28 14:33:26 +08:00
d37b73fd31
drtio: FIFO timeout is handled in gateware + give remote side more time
2016-11-28 14:33:06 +08:00
046b8bfd33
drtio: fix transmit datapath with transceiver width > max packet width
2016-11-27 13:19:12 +08:00
b2450c7c56
drtio: test large data
2016-11-27 12:57:12 +08:00
0903964488
drtio: large data fixes
2016-11-27 02:12:50 +08:00
whitequark
ea25856d92
runtime: match argument signedness between ARTIQ Python and ksupport.
...
This is only required when reading the ABI very strictly, but better
be conservative here than spend time debugging silly stuff.
2016-11-26 07:25:22 +00:00
whitequark
cf12a888e7
runtime: refactor rtio_output_list.
2016-11-26 07:25:22 +00:00
whitequark
79e70fa465
runtime: use correct ABI when accepting ARTIQ lists.
2016-11-26 07:25:22 +00:00
d381dd5384
drtio: remove stale signal from test
2016-11-25 18:33:55 +08:00
8090abef5d
drtio: large data support
2016-11-25 17:04:09 +08:00
55e37b41ec
phaser: use ttl_simple.Input for sync
2016-11-24 15:55:26 +01:00
6fa2a6ebd8
phaser: move ad9154 spi/jesd api to rust
2016-11-24 15:53:14 +01:00
8060652913
phaser: use Inout_8X
2016-11-24 15:21:03 +01:00
617650f3b2
phaser: extract target
2016-11-24 15:20:51 +01:00
1c84d1ee59
Merge branch 'master' into phaser2
...
* master:
rtio: support differential ttl
RELEASE_NOTES: int(a, width=b) removal, use int32/64
pc_rpc: use ProactorEventLoop on Windows (#627 )
2016-11-24 15:05:49 +01:00
95c885b580
rtio: support differential ttl
2016-11-24 15:04:12 +01:00
7d4297b9bb
pc_rpc: use ProactorEventLoop on Windows ( #627 )
2016-11-24 10:19:13 +08:00
8b736ddbc9
drtio: update test
2016-11-24 00:37:53 +08:00
7cd27abaa6
drtio: do not reset remote TSC on reset command
2016-11-24 00:09:53 +08:00
dab19d23cc
runtime: support rtio data wider than 64 bit
2016-11-23 16:40:52 +01:00
fbf60108a8
moninj.rs: force u32 dds_ftws
2016-11-23 16:39:08 +01:00
0d5f962d0c
runtime.rs/rtio.rs: style
2016-11-23 23:27:59 +08:00
eab18d8e34
runtime.rs: wide rtio data
2016-11-23 23:27:46 +08:00
2d62a89143
rtio: use large data register
2016-11-23 23:23:27 +08:00
07f2d84275
drtio: remote resets
2016-11-23 23:19:31 +08:00
9941f3557d
rtio: use only CRI commands for rio/rio_phy resets
2016-11-23 23:19:14 +08:00
