85ea70a664
analyzer: fix byte_count
2016-03-15 20:33:08 +08:00
62ac4e3c2e
analyzer: fix EOP generation
2016-03-15 20:25:02 +08:00
b5ec979db3
analyzer: drive wishbone cyc signal
2016-03-15 19:46:12 +08:00
8a6873cab2
analyzer: use EOP, flush pipeline on stop
2016-03-15 17:49:59 +08:00
Florent Kermarrec
8ad799a850
gateware/rtio/analyzer: use new Converter
2016-03-14 15:15:07 +01:00
de718fc819
rtio: fix different address collision detection
2016-03-10 12:15:36 +08:00
f4f95d330b
Merge branch 'master' of github.com:m-labs/artiq
2016-03-10 11:15:30 +08:00
542a375305
rtio: remove NOP suppression capability
...
Back when RTIO was driving TTLs, this functionality made it simpler to use by removing some irrelevant underflows.
The same technique is not applicable to DDS and SPI, so the user will have to deal with such underflows.
This patch makes the behavior of RTIO more consistent and the code simpler.
2016-03-10 09:47:29 +08:00
2e39802a61
rtio/wishbone: make replace configurable
2016-03-10 09:44:05 +08:00
107e5cfbd4
gateware/rtio: factor _BlindTransfer
2016-03-09 19:07:46 +01:00
349a66124b
Merge branch 'master' into rtiobusy
...
* master:
coredevice: fix _DDSGeneric __init__ args
rtio/core: fix syntax
rtio: disable replace on rt2wb channels
examples: dds_bus -> core_dds
fix more multi-DDS-bus problems
runtime: fix dds declarations
support for multiple DDS buses (untested)
2016-03-09 17:58:58 +01:00
3f8e431de6
rtio/core: fix syntax
2016-03-09 17:10:21 +01:00
03b53c3af9
rtio: disable replace on rt2wb channels
2016-03-09 23:37:04 +08:00
2cb58592ff
rtio: add RTIOBusy
2016-03-08 18:04:34 +01:00
2953b069dc
rtio: when rtlink addresses are different, issue collision not replace ( fixes #320 )
2016-03-08 15:58:25 +08:00
71105fd0d7
rtio: collision_error -> collision
2016-03-08 15:38:35 +08:00
a0083f4501
Revert "gateware/rt2wb: only input when active"
...
This reverts commit 1b08e65fa1
2016-02-29 16:44:11 +01:00
cb8815cc65
Revert "gateware/rt2wb: support combinatorial ack"
...
This reverts commit f73228f248
2016-02-29 16:44:04 +01:00
f73228f248
gateware/rt2wb: support combinatorial ack
2016-02-29 15:40:55 +01:00
1b08e65fa1
gateware/rt2wb: only input when active
2016-02-29 14:56:29 +01:00
f8732acece
rtio.spi: drop unused argument
2016-02-28 21:06:20 +01:00
e7146cc999
gateware.spi: design sketch
2016-02-26 17:03:08 +01:00
68891493a3
analyzer: move common to artiq.protocols
...
migen was still pulled in through rtio.__init__.py
2016-01-29 20:26:48 -07:00
cbb60337ae
refactor Analyzer constants to unlink dependencies
2016-01-25 18:03:48 -07:00
080752092c
gateware/rtio: add LogChannel
2015-12-26 22:43:28 +08:00
9ba8dfbf23
gateware/rtio/core: avoid potential python bug
2015-12-26 22:11:57 +08:00
8691f69a3c
gateware/rtio/analyzer: suppress spurious initial reset messages
2015-12-21 18:32:08 +08:00
5769107936
gateware/rtio: keep counter clock domain transfer active during CSR reset
2015-12-20 22:12:34 +08:00
46f59b673f
coredevice: analyzer message decoding
2015-12-20 14:34:16 +08:00
1638f0fa9b
gateware/rtio/analyzer: fix event ordering
2015-12-19 17:04:30 +08:00
64ad38854b
gateware/rtio/analyzer: fix exception message layout
2015-12-18 18:27:06 +08:00
59a3ea4f15
gateware/rtio/analyzer: fix bus write
2015-12-18 15:44:20 +08:00
afaad270cc
rtio/analyzer: fix superficial mistakes
2015-12-16 17:36:36 +08:00
4362f97d67
gateware/rtio/analyzer: complete, untested
2015-12-14 23:53:14 +08:00
b5f2e178f6
rtio/analyzer: message encoder
2015-12-14 00:37:08 +08:00
e26147b2ac
gateware,runtime: use new migen/misoc
2015-11-04 00:35:03 +08:00
e46ba83513
rtio/dds: use rio_phy domain to reset FTW tracker. Closes #120
2015-10-04 22:53:51 +08:00
01416bb0be
copyright: claim contributions
...
These are contributions of >= 30% or >= 20 lines (half-automated).
I hereby resubmit all my previous contributions to the ARTIQ project
under the following terms:
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/ >.
Closes #130
Signed-off-by: Robert Jordens <jordens@gmail.com>
2015-09-06 16:08:57 -06:00
90ce54d8d5
gateware/dds/monitor: support onehot selection, strip reset
2015-08-27 15:54:01 +08:00
1d34c06d79
rtio: detect collision errors
2015-07-29 19:43:35 +08:00
fb339d294e
serdes_s6: no need to reset
2015-07-28 12:54:31 -06:00
9ac5bc52d4
rtio: add spartan6 serdes, 4x and 8x
2015-07-27 21:01:15 -06:00
b1d58bd4c8
rtio: fix replace/sequence_error when fine_ts_width > 0
2015-07-27 12:22:35 +08:00
959b7a7b46
rtio: resetless -> reset_less
2015-07-27 11:46:56 +08:00
fe6a5c42df
rtio: remove unused clk_freq argument
2015-07-27 10:57:15 +08:00
5b50f5fe05
rtio/ttl_serdes_7series: use recommended OSERDES T configuration
2015-07-27 10:50:50 +08:00
f68d5cbd73
rtio: forward rtio domain reset to rio and rio_phy domains
2015-07-27 01:52:47 +08:00
940aa815dd
rtio/ttl_serdes: cleanup/rewrite
2015-07-27 01:44:52 +08:00
Yann Sionneau
d90dff4ef1
rtio: add SERDES TTL (WIP)
2015-07-26 17:40:34 +08:00
47191eda91
dds monitor: relax timing (for pipistrello)
2015-07-19 21:36:51 -06:00
66940ea815
rtio: disable NOP suppression after reset and underflow
2015-07-15 20:54:55 +02:00
8a33d8c868
never stop RTIO counter
2015-07-07 15:29:38 +02:00
58c0150822
ttl: improve clockgen doc
2015-07-05 19:07:13 +02:00
753d61b38f
complete support for TTL clock generator
2015-07-04 18:36:01 +02:00
2881d5f00a
gateware: add RTIO clock generator
2015-07-02 18:20:26 +02:00
944bfafefa
soc: support QC2 and AD9914 (untested)
2015-06-28 21:37:27 +02:00
f47c2e54e1
DDS monitor fixes
2015-06-19 17:36:46 -06:00
5a9bdb2e33
DDS monitoring
2015-06-19 15:30:17 -06:00
b2af0f6cc3
soc,runtime: support TTL override
2015-06-09 19:51:02 +08:00
a2ae5e4706
runtime: report TTL status over UDP
2015-06-03 18:26:19 +08:00
b81151eb42
soc: rtio monitor
2015-06-02 17:41:40 +08:00
a36c51eb83
DDS over RTIO (batch mode not supported yet)
2015-05-08 14:44:39 +08:00
cb65b1e322
rtio/phy/ttl_simple: reset sensitivity with RTIO logic
2015-05-02 16:17:31 +08:00
a61d701d47
rtio: decouple PHY reset from logic reset
2015-05-02 11:47:11 +08:00
27d94a22de
rtio: expose full_ts_width instead of counter_width parameter
2015-04-28 01:38:11 +08:00
546996f896
coredevice,runtime: put ref_period into the ddb
2015-04-16 15:15:38 +08:00
71167b8adf
rtio: do not attempt latency compensation in gateware
2015-04-16 13:09:29 +08:00
6215d63491
rtio: do not create spurious CSRs when data_width/address_width is 0
2015-04-16 13:04:19 +08:00
26003781b4
rtio/rtlink: add 'like' methods to clone interfaces
2015-04-16 13:02:39 +08:00
30dffb6644
rtio/phy: add wishbone adapter
2015-04-15 20:39:40 +08:00
4c10182c9f
rtio: refactor, use rtlink
2015-04-14 19:44:45 +08:00
ff9a7727d2
rtio: add rtlink definition (currently unused)
2015-04-13 22:19:18 +08:00
Florent Kermarrec
2995f0a705
remove use of _r prefix on CSRs
2015-04-02 18:30:44 +08:00
3122623c6f
rtio: make 63-bit timestamp counter the default [soc]
2015-03-12 13:13:35 +01:00
28bce9ee40
artiqlib -> artiq.gateware
2015-03-08 11:00:24 +01:00
