Commit Graph

5689 Commits

Author SHA1 Message Date
1d678b7dac firmware: expose fmod to kernels. Closes #1417 2020-01-10 14:33:22 +08:00
0ef3515d22 artiq_client: add back quiet-verbose args for submission
close #1416
regression introduced in 3fd6962
2019-12-31 13:01:53 +01:00
ae4f4b335b runtime: relax/fix TCP keepalive settings (#1125) 2019-12-23 19:58:39 +08:00
David Nadlinger
4431f9b0e4 coredevice: Don't use is to compare with integer literal
This works on CPython, but is not guaranteed to do so, and
produces a warning since 3.8 (see https://bugs.python.org/issue34850).
2019-12-22 19:07:16 +08:00
6639d9443d basemod_att: add dB functions, document 2019-12-21 14:57:08 +08:00
5ff164b385 basemod: add coredevice driver 2019-12-21 14:57:08 +08:00
6c4790b979 kasli_sawgmaster: fix drtio_is_up 2019-12-21 14:57:08 +08:00
902db1d95a shiftreg: fix get method 2019-12-21 14:57:08 +08:00
0e847c07da kasli_sawgmaster: update device_db for BaseMod 2019-12-20 19:59:39 +08:00
59e8b77fca coredevice/shiftreg: add get method 2019-12-20 19:59:39 +08:00
c8b8f7a4be sayma_rtm: connect attenuator shift registers in series 2019-12-20 19:59:39 +08:00
26e8b9d02a firmware: remove legacy hmc542 code 2019-12-20 15:25:12 +08:00
a3e2a46510 sayma_rtm: add basemod attenuators on RTIO 2019-12-20 15:23:15 +08:00
d5f92a20c6 sayma_rtm: basemod RF switches 2019-12-18 10:33:46 +08:00
cb0515e677 test: run test_help for browser and dashboard 2019-12-12 10:34:44 +08:00
007a98bac4 artiq_browser: fix command line argument handling. Closes #1404 2019-12-11 16:19:09 +08:00
d159d0e901 sayma_rtm: drive clk_src_ext_sel 2019-12-09 19:50:00 +08:00
Paweł Kulik
b6f7698a69 Enabled internal pullup for CML SYSREF outputs, otherwise there is no signal on them.
Signed-off-by: Paweł Kulik <pawel.kulik@creotech.pl>
2019-12-07 09:34:54 +08:00
da95bb54ae artiq_flash: sayma fixes 2019-11-28 17:40:59 +08:00
281133ef6e libboard_misoc: fix !has_i2c 2019-11-27 21:21:29 +08:00
349474670f si5324: 10 MHz ext_ref_frequency
* close #1254
* tested on innsbruck2 kasli variant
* sponsored by Uni Innsbruck/AQT

Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-11-27 14:14:21 +08:00
ef1871bcea gateware: remove wrpll
Will be part of ARTIQ-6.
2019-11-14 17:30:10 +08:00
db13747279 fix device_db alias corner case bugs. Closes #1140 2019-11-14 16:22:45 +08:00
4707aef45c split out artiq-comtools 2019-11-14 15:21:51 +08:00
4416378d21 frontend: add --version to common tools 2019-11-14 11:42:31 +08:00
Garrett
f8a7e278b8 removed OSK-related changes in AD9910, to be included in a separate branch. 2019-11-12 19:07:05 +01:00
Garrett
3a19ba7e62 added docstrings to ad9910.py 2019-11-12 19:07:05 +01:00
Garrett
4ad3651022 fixed typo in ad9910.py 2019-11-12 19:07:05 +01:00
Garrett
6d34eb3bb0 updated docstrings for set_cfr1() in ad9910.py 2019-11-12 19:07:05 +01:00
Garrett
61ca46ec3f updated adoo10.py for RAM mode frequency control 2019-11-12 19:07:05 +01:00
fd7081830c remove fire_and_forget (moved to sipyco) 2019-11-12 19:43:04 +08:00
3fd6962bd2 use sipyco (#585) 2019-11-10 15:55:17 +08:00
6644903843 bootloader: fix imports 2019-11-06 14:45:55 +08:00
5279bc275a urukul: rework EEPROM synchronization. Closes #1372 2019-11-05 18:56:10 +08:00
David Nadlinger
bc3b55b1a8 gateware/eem: Force IOB=TRUE on Urukul SYNC output
Without this, the final register in the SYNC signal TTLClockGen
isn't (always) placed in the I/O tile, leading to more jitter
than necessary, and causing "double window" artefacts. See
sinara-hw/Urukul#16 for more details.

(Patch based on work by Weida Zhang, testing by various members
of the community in Oxford and elsewhere.)
2019-11-05 17:14:07 +08:00
b25a17fa37 netboot: support slave FPGA loading 2019-11-05 16:28:49 +08:00
307f39e900 remoting: fix multiuser access. Closes #1383 2019-11-05 15:46:07 +08:00
9dc82bd766 bootloader: add no_flash_boot config option to force network boot 2019-11-05 15:31:08 +08:00
e2f9f59472 artiq_flash: fix flashing Sayma RTM from package 2019-11-05 15:19:01 +08:00
98854473dd sayma_amc: use all transceivers on master (#1230) 2019-11-02 12:12:32 +08:00
29b4d87943 firmware: add cargosha256.nix 2019-11-01 10:28:41 +08:00
5362f92b39 bootloader: disable minimum stack space check in linker script
* The value varies greatly whether netboot is enabled or not.
* There is no simple solution to detect has_ethmac in the linker script and set the value accordingly.
* The space check is an imperfect solution that will be superseded by stack pointer limits.
* Left commented out so we can re-enable it manually during development if stack corruption is suspected.
2019-11-01 10:25:14 +08:00
deadfead2a bootloader: fix !has_ethmac 2019-11-01 10:19:08 +08:00
42af76326f kasli: enlarge integrated CPU SRAM for DRTIO masters
Required by the bootloader netboot support.
2019-11-01 10:15:13 +08:00
a78e493b72 firmware: load slave FPGA in bootloader 2019-10-31 12:42:40 +08:00
389a8f587a slave_fpga: modularize 2019-10-31 11:50:53 +08:00
9a35a2ed81 test_frontends: update 2019-10-30 22:02:16 +08:00
bc050fdeec bootloader: treat zero-length firmware in flash as no firmware 2019-10-30 21:46:06 +08:00
228e44a059 sayma: enable Ethernet on DRTIO satellite variant
So that netboot can be used in bootloader.
2019-10-30 21:39:00 +08:00
dc71039934 sayma, metlino: increase integrated_sram_size on Ethernet-enabled variants 2019-10-30 21:36:00 +08:00
3042476230 artiq_netboot: remove unnecessary import 2019-10-30 21:29:33 +08:00
c96de7454d remove artiq_devtool 2019-10-30 21:27:24 +08:00
88dbff46f4 add netboot tool 2019-10-30 21:24:51 +08:00
462cf5967e bootloader: add netboot support 2019-10-30 21:23:42 +08:00
1f15e55021 comm_analyzer: don't assume every message has data
close #1377
2019-10-28 15:35:44 +01:00
David Nadlinger
611bcc4db4 compiler: Cache expensive target data layout queries
On one typical experiment, this shaves about 3 seconds (~25%)
off the overall kernel compilation time.

GitHub: Closes #1370.
2019-10-28 11:09:25 +00:00
David Nadlinger
5d7f22ffa4 compiler: Remove provision for unused four-parameter llptr_to_var() form [nfc]
`var_type` was presumably intended to convert to a target type,
but wasn't actually acted on in the function body (nor was it
used anywhere in the codebase).
2019-10-28 11:02:46 +00:00
f2f7170d20 hmc7043: use recommend I/O standards
https://github.com/sinara-hw/Sayma_RTM/issues/116#issuecomment-544187952
2019-10-21 22:56:10 +08:00
47a83c71f1 firmware: more readable network addresses message 2019-10-21 14:00:14 +08:00
818d6b2f5a bootloader: fix compilation problems 2019-10-21 13:28:17 +08:00
8f76a3218e firmware: move i2c to libboard_misoc, enable IPv6 in bootloader, share network settings 2019-10-21 12:58:52 +08:00
1c5e749036 satman: remove compilation warning without JESD DACs 2019-10-21 12:53:54 +08:00
d26d80410e runtime: refactor network settings 2019-10-19 17:56:35 +08:00
6d5dcb4211 runtime: enable IPv6. Closes #349 2019-10-19 17:20:33 +08:00
05e8f24c24 sayma2: JESD204 synchronization 2019-10-18 23:28:47 +08:00
62b49882b9 examples/kc705: fix dds_test 2019-10-17 07:37:00 +08:00
a8f85860c4 coreanalyzer: AD9914 fixes (#1376) 2019-10-17 07:29:33 +08:00
d42ff81144 examples/sayma_master: update device_db 2019-10-16 18:49:25 +08:00
8fa3c6460e sayma_amc: set direction of external TTL buffer according to RTIO PHY OE 2019-10-16 18:48:50 +08:00
37d0a5dc19 rtio/ttl: expose OE 2019-10-16 18:48:20 +08:00
bc060b7f01 style 2019-10-16 18:18:11 +08:00
40d64fc782 sayma: remove standalone examples (no longer supported) 2019-10-16 17:54:39 +08:00
21a1c6de3f sayma: use SFP0 for DRTIO master 2019-10-16 17:53:40 +08:00
6cf06fba7b examples: use default IP addresses for boards 2019-10-16 16:18:30 +08:00
314d9b5d06 kasli: default to 125MHz frequency for DRTIO
This is the consistent and most common option. Sayma will also eventually move to it.
2019-10-08 12:59:52 +08:00
4df2c5d1fb sayma: prepare for SYSREF align
We will try DDMTD on the AMC first, as this is simpler and perhaps will work on v2 after the power supply fixes.
2019-10-08 12:30:47 +08:00
5ee81dc643 satman: define constants for JdacBasicRequest reqnos 2019-10-08 10:27:04 +08:00
4b3baf4825 firmware: run PRBS and STPL JESD204 tests 2019-10-08 00:10:36 +08:00
03007b896e sayma_amc: sma -> mcx 2019-10-07 20:31:35 +08:00
ebd5d890f1 satman: check for JESD ready 2019-10-06 23:10:57 +08:00
90e3b83e80 hmc7043: turn on AMC_FPGA_SYSREF1
Florent's JESD core won't work at all without.
2019-10-06 22:49:00 +08:00
97a0dee3e8 jesd204: remove ibuf_disable
We use the MOSFET to mute the HMC7043 noise on hardware v2 instead.
2019-10-06 22:26:31 +08:00
1bc7743e03 sayma: fix hmc7043 output settings for v2 hardware 2019-10-06 21:50:29 +08:00
a421820a32 sayma: initialize DACs over DRTIO 2019-10-06 21:42:45 +08:00
f8e4cc37d0 sayma_rtm: reset and detect DACs 2019-10-06 20:15:27 +08:00
f62dc7e1d4 sayma: refactor JESD DAC channel groups 2019-10-06 20:15:09 +08:00
c4c884b8ce ad9154: simplify, focus on AD9154 config and do not include JESD 2019-10-06 20:07:02 +08:00
fdba0bfbbc satman: move now-unrelated hmc830_7043 init away from DRTIO transceiver init 2019-10-06 19:22:46 +08:00
1c6c22fde9 sayma_amc: HMC830_REF moved to RTM side 2019-10-06 18:15:37 +08:00
ad63908aff hmc830_7043: enable_fpga_ibuf -> unmute 2019-10-06 18:13:59 +08:00
5ad65b9d30 hmc830_7043: remove clock_mux 2019-10-06 18:13:27 +08:00
e6ff44301b sayma_amc: cleanup (v2.0 only) 2019-10-06 18:11:43 +08:00
e9b81f6e33 remove serwb
DRTIO is a better solution
2019-10-06 18:10:23 +08:00
7cd02d30b7 sayma_rtm_drtio: replace sayma_rtm 2019-10-06 17:59:53 +08:00
b3b85135a3 sayma_rtm_drtio: add DDMTD core, move specific cores out of SatelliteBase 2019-10-06 17:59:11 +08:00
346c985347 sayma_rtm_drtio: use artiq_sayma folder 2019-10-06 17:30:08 +08:00
e2a924449d artiq_flash: use DRTIO RTM gateware 2019-10-06 17:28:14 +08:00
4198033657 sayma_rtm_drtio: cleanup (v2.0 only) 2019-10-06 16:42:34 +08:00
5612b31860 sayma_rtm_drtio: add HMC clock chip and DAC control 2019-10-06 16:15:24 +08:00
a8cf4c2b18 sayma_rtm: hwrev v2.0 by default 2019-10-06 13:25:30 +08:00