From fe53bab953d2cd064549eb1f1ac384b0f91df093 Mon Sep 17 00:00:00 2001
From: Sebastien Bourdeauducq <sb@m-labs.hk>
Date: Thu, 5 Jan 2017 18:40:56 +0100
Subject: [PATCH] targets: kc705 -> kc705_dds

---
 artiq/frontend/artiq_devtool.py                   | 2 +-
 artiq/gateware/targets/{kc705.py => kc705_dds.py} | 4 ++--
 artiq/gateware/targets/kc705_drtio_master.py      | 2 +-
 artiq/gateware/targets/kc705_drtio_satellite.py   | 2 +-
 artiq/gateware/targets/phaser.py                  | 3 +--
 artiq/gateware/targets/pipistrello.py             | 2 +-
 conda/artiq-kc705-nist_clock/build.sh             | 2 +-
 conda/artiq-kc705-nist_qc2/build.sh               | 2 +-
 doc/manual/installing_from_source.rst             | 2 +-
 9 files changed, 10 insertions(+), 11 deletions(-)
 rename artiq/gateware/targets/{kc705.py => kc705_dds.py} (98%)

diff --git a/artiq/frontend/artiq_devtool.py b/artiq/frontend/artiq_devtool.py
index f30cc99da..8dc8d9795 100644
--- a/artiq/frontend/artiq_devtool.py
+++ b/artiq/frontend/artiq_devtool.py
@@ -84,7 +84,7 @@ def main():
         if action == "build":
             logger.info("Building runtime")
             try:
-                subprocess.check_call(["python3", "-m", "artiq.gateware.targets.kc705",
+                subprocess.check_call(["python3", "-m", "artiq.gateware.targets.kc705_dds",
                                             "-H", "nist_clock",
                                             "--no-compile-gateware",
                                             "--output-dir", "/tmp/kc705"])
diff --git a/artiq/gateware/targets/kc705.py b/artiq/gateware/targets/kc705_dds.py
similarity index 98%
rename from artiq/gateware/targets/kc705.py
rename to artiq/gateware/targets/kc705_dds.py
index 8d3bd855d..7a2e395d7 100755
--- a/artiq/gateware/targets/kc705.py
+++ b/artiq/gateware/targets/kc705_dds.py
@@ -314,8 +314,8 @@ class NIST_QC2(_NIST_Ions):
 
 def main():
     parser = argparse.ArgumentParser(
-        description="ARTIQ core device builder / KC705 "
-                    "+ NIST Ions CLOCK/QC2 hardware adapters")
+        description="ARTIQ device binary builder / single-FPGA KC705-based "
+                    "systems with AD9 DDS (NIST Ions hardware)")
     builder_args(parser)
     soc_kc705_args(parser)
     parser.add_argument("-H", "--hw-adapter", default="nist_clock",
diff --git a/artiq/gateware/targets/kc705_drtio_master.py b/artiq/gateware/targets/kc705_drtio_master.py
index 6628b221f..627f2c138 100755
--- a/artiq/gateware/targets/kc705_drtio_master.py
+++ b/artiq/gateware/targets/kc705_drtio_master.py
@@ -105,7 +105,7 @@ class Master(MiniSoC, AMPSoC):
 
 def main():
     parser = argparse.ArgumentParser(
-        description="ARTIQ with DRTIO on KC705 - Master")
+        description="ARTIQ device binary builder / KC705 DRTIO master")
     builder_args(parser)
     soc_kc705_args(parser)
     parser.add_argument("-c", "--config", default="simple_gbe",
diff --git a/artiq/gateware/targets/kc705_drtio_satellite.py b/artiq/gateware/targets/kc705_drtio_satellite.py
index beea95e2a..a57a93924 100755
--- a/artiq/gateware/targets/kc705_drtio_satellite.py
+++ b/artiq/gateware/targets/kc705_drtio_satellite.py
@@ -202,7 +202,7 @@ class Satellite(BaseSoC):
 
 def main():
     parser = argparse.ArgumentParser(
-        description="ARTIQ with DRTIO on KC705 - Satellite")
+        description="ARTIQ device binary builder / KC705 DRTIO satellite")
     builder_args(parser)
     soc_kc705_args(parser)
     parser.add_argument("-c", "--config", default="simple_gbe",
diff --git a/artiq/gateware/targets/phaser.py b/artiq/gateware/targets/phaser.py
index a8b9a7841..c1782e014 100755
--- a/artiq/gateware/targets/phaser.py
+++ b/artiq/gateware/targets/phaser.py
@@ -257,8 +257,7 @@ class Phaser(MiniSoC, AMPSoC):
 
 def main():
     parser = argparse.ArgumentParser(
-        description="ARTIQ core device builder for "
-                    "KC705+AD9154 hardware")
+        description="ARTIQ device binary builder / KC705 phaser demo")
     builder_args(parser)
     soc_kc705_args(parser)
     args = parser.parse_args()
diff --git a/artiq/gateware/targets/pipistrello.py b/artiq/gateware/targets/pipistrello.py
index 503144070..122831994 100755
--- a/artiq/gateware/targets/pipistrello.py
+++ b/artiq/gateware/targets/pipistrello.py
@@ -229,7 +229,7 @@ trce -v 12 -fastpaths -tsi {build_name}.tsi -o {build_name}.twr {build_name}.ncd
 
 def main():
     parser = argparse.ArgumentParser(
-        description="ARTIQ core device builder / Pipistrello demo")
+        description="ARTIQ device binary builder / Pipistrello demo")
     builder_args(parser)
     soc_pipistrello_args(parser)
     args = parser.parse_args()
diff --git a/conda/artiq-kc705-nist_clock/build.sh b/conda/artiq-kc705-nist_clock/build.sh
index bb4c78e9b..b7c7087aa 100644
--- a/conda/artiq-kc705-nist_clock/build.sh
+++ b/conda/artiq-kc705-nist_clock/build.sh
@@ -6,7 +6,7 @@ BUILD_SETTINGS_FILE=$HOME/.m-labs/build_settings.sh
 SOC_PREFIX=$PREFIX/lib/python3.5/site-packages/artiq/binaries/kc705-nist_clock
 mkdir -p $SOC_PREFIX
 
-$PYTHON -m artiq.gateware.targets.kc705 -H nist_clock --toolchain vivado $MISOC_EXTRA_VIVADO_CMDLINE
+$PYTHON -m artiq.gateware.targets.kc705_dds -H nist_clock --toolchain vivado $MISOC_EXTRA_VIVADO_CMDLINE
 cp misoc_nist_clock_kc705/gateware/top.bit $SOC_PREFIX
 cp misoc_nist_clock_kc705/software/bios/bios.bin $SOC_PREFIX
 cp misoc_nist_clock_kc705/software/runtime/runtime.fbi $SOC_PREFIX
diff --git a/conda/artiq-kc705-nist_qc2/build.sh b/conda/artiq-kc705-nist_qc2/build.sh
index 988f031d3..32b04a9f7 100644
--- a/conda/artiq-kc705-nist_qc2/build.sh
+++ b/conda/artiq-kc705-nist_qc2/build.sh
@@ -6,7 +6,7 @@ BUILD_SETTINGS_FILE=$HOME/.m-labs/build_settings.sh
 SOC_PREFIX=$PREFIX/lib/python3.5/site-packages/artiq/binaries/kc705-nist_qc2
 mkdir -p $SOC_PREFIX
 
-$PYTHON -m artiq.gateware.targets.kc705 -H nist_qc2 --toolchain vivado $MISOC_EXTRA_VIVADO_CMDLINE
+$PYTHON -m artiq.gateware.targets.kc705_dds -H nist_qc2 --toolchain vivado $MISOC_EXTRA_VIVADO_CMDLINE
 cp misoc_nist_qc2_kc705/gateware/top.bit $SOC_PREFIX
 cp misoc_nist_qc2_kc705/software/bios/bios.bin $SOC_PREFIX
 cp misoc_nist_qc2_kc705/software/runtime/runtime.fbi $SOC_PREFIX
diff --git a/doc/manual/installing_from_source.rst b/doc/manual/installing_from_source.rst
index 394666191..8284dbd69 100644
--- a/doc/manual/installing_from_source.rst
+++ b/doc/manual/installing_from_source.rst
@@ -170,7 +170,7 @@ These steps are required to generate gateware bitstream (``.bit``) files, build
 
     * For KC705::
 
-        $ python3.5 -m artiq.gateware.targets.kc705 -H nist_clock # or nist_qc2
+        $ python3.5 -m artiq.gateware.targets.kc705_dds -H nist_clock # or nist_qc2
 
     .. note:: Add ``--toolchain ise`` if you wish to use ISE instead of Vivado.