From fb339d294ea9a58d9fcd319c5f8e094b56d3619d Mon Sep 17 00:00:00 2001 From: Robert Jordens Date: Tue, 28 Jul 2015 01:21:11 -0600 Subject: [PATCH] serdes_s6: no need to reset --- artiq/gateware/rtio/phy/ttl_serdes_spartan6.py | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/artiq/gateware/rtio/phy/ttl_serdes_spartan6.py b/artiq/gateware/rtio/phy/ttl_serdes_spartan6.py index 89fddb2d0..cf31449c1 100644 --- a/artiq/gateware/rtio/phy/ttl_serdes_spartan6.py +++ b/artiq/gateware/rtio/phy/ttl_serdes_spartan6.py @@ -103,8 +103,7 @@ class _OSERDES2_4X(Module): p_DATA_WIDTH=4, p_OUTPUT_MODE="SINGLE_ENDED", i_TRAIN=0, i_CLK0=ClockSignal("rtiox4"), i_CLK1=0, i_CLKDIV=ClockSignal("rio_phy"), - i_IOCE=stb, i_OCE=1, i_TCE=1, - i_RST=ResetSignal(), + i_IOCE=stb, i_OCE=1, i_TCE=1, i_RST=0, i_T4=self.t_in, i_T3=self.t_in, i_T2=self.t_in, i_T1=self.t_in, i_D4=o[3], i_D3=o[2], i_D2=o[1], i_D1=o[0],