From f9b2c3273993bfb677cc30284046fa008e42c77d Mon Sep 17 00:00:00 2001 From: Robert Jordens Date: Wed, 25 Apr 2018 16:23:30 +0000 Subject: [PATCH] suservo: add pgia spi channel --- artiq/gateware/targets/kasli.py | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/artiq/gateware/targets/kasli.py b/artiq/gateware/targets/kasli.py index 6bd39081f..c27035746 100755 --- a/artiq/gateware/targets/kasli.py +++ b/artiq/gateware/targets/kasli.py @@ -547,6 +547,12 @@ class SUServo(_StandaloneBase): self.submodules += mem rtio_channels.append(rtio.Channel.from_phy(mem, ififo_depth=4)) + # EEM3: Sampler + phy = spi2.SPIMaster(self.platform.request("eem3_pgia_spi_p"), + self.platform.request("eem3_pgia_spi_n")) + self.submodules += phy + rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=4)) + # EEM5 + EEM4: Urukul phy = spi2.SPIMaster(self.platform.request("eem5_spi_p"), self.platform.request("eem5_spi_n"))