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manual: add precision about sequence errors

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Sebastien Bourdeauducq 2019-01-09 18:58:22 +08:00
parent 9b213b17af
commit f8a94725e9
1 changed files with 2 additions and 1 deletions
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doc/manual/rtio.rst
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@ -126,7 +126,8 @@ Internally, the gateware stores output events in an array of FIFO buffers (the "
Notes: Notes:
* Strictly increasing timestamps never cause sequence errors. * Strictly increasing timestamps never cause sequence errors.
* Configuring the gateware with more lanes for the RTIO core reduces the frequency of sequence errors. * Configuring the gateware with more lanes for the RTIO core reduces the frequency of sequence errors.
* The number of lanes is a hard limit on the number of simultaneous RTIO output events.
* Whether a particular sequence of timestamps causes a sequence error or not is fully deterministic (starting from a known RTIO state, e.g. after a reset). Adding a constant offset to the whole sequence does not affect the result. * Whether a particular sequence of timestamps causes a sequence error or not is fully deterministic (starting from a known RTIO state, e.g. after a reset). Adding a constant offset to the whole sequence does not affect the result.
The offending event is discarded and the RTIO core keeps operating. The offending event is discarded and the RTIO core keeps operating.