From f62c1ff0bb1129c2383e9062cd3445ad31c3a8ff Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Robert=20J=C3=B6rdens?= Date: Thu, 25 Oct 2018 09:52:00 +0000 Subject: [PATCH] TTLClockGen: expose acc_width MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Robert Jördens --- artiq/coredevice/ttl.py | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/artiq/coredevice/ttl.py b/artiq/coredevice/ttl.py index 09732fccc..4069c62aa 100644 --- a/artiq/coredevice/ttl.py +++ b/artiq/coredevice/ttl.py @@ -371,16 +371,17 @@ class TTLClockGen: The time cursor is not modified by any function in this class. :param channel: channel number + :param acc_width: accumulator width in bits """ kernel_invariants = {"core", "channel", "acc_width"} - def __init__(self, dmgr, channel, core_device="core"): + def __init__(self, dmgr, channel, acc_width=24, core_device="core"): self.core = dmgr.get(core_device) self.channel = channel # in RTIO cycles self.previous_timestamp = numpy.int64(0) - self.acc_width = numpy.int64(24) + self.acc_width = numpy.int64(acc_width) @portable def frequency_to_ftw(self, frequency):