forked from M-Labs/artiq
1
0
Fork 0

runtime: impl riscv exception handling

This commit is contained in:
occheung 2021-08-06 11:02:38 +08:00
parent 252594a606
commit ecedec577c
1 changed files with 60 additions and 22 deletions

View File

@ -257,13 +257,51 @@ pub extern fn main() -> i32 {
}
}
#[derive(Debug, Clone, Copy)]
#[repr(C)]
pub struct TrapFrame {
pub ra: usize,
pub t0: usize,
pub t1: usize,
pub t2: usize,
pub t3: usize,
pub t4: usize,
pub t5: usize,
pub t6: usize,
pub a0: usize,
pub a1: usize,
pub a2: usize,
pub a3: usize,
pub a4: usize,
pub a5: usize,
pub a6: usize,
pub a7: usize,
}
#[no_mangle]
pub extern fn exception(vect: u32, _regs: *const u32, pc: u32, ea: u32) {
let vect = irq::Exception::try_from(vect).expect("unknown exception");
match vect {
irq::Exception::Interrupt =>
panic!("spurious irq {}", irq::pending_mask().trailing_zeros()),
_ => {
pub extern fn exception(regs: *const TrapFrame) {
unsafe {
let pc = mepc::read();
let cause = mcause::read().cause();
match cause {
mcause::Trap::Interrupt(source) => {
info!("Called interrupt with {:?}", source);
// while irq::pending_mask() != 0 {
// match () {
// #[cfg(has_timer1)]
// () if irq::is_pending(csr::TIMER1_INTERRUPT) =>
// profiler::sample(pc as usize),
// _ => {
// panic!("spurious irq {}", irq::pending_mask().trailing_zeros())
// }
// }
// }
panic!("Interrupt not present");
},
mcause::Trap::Exception(e) => {
println!("Stack pointer: {:p}", regs);
println!("Trap frame: {:x?}", unsafe { *regs });
fn hexdump(addr: u32) {
let addr = (addr - addr % 4) as *const u32;
let mut ptr = addr;
@ -277,9 +315,9 @@ pub extern fn exception(vect: u32, _regs: *const u32, pc: u32, ea: u32) {
}
}
hexdump(pc);
hexdump(ea);
panic!("exception {:?} at PC 0x{:x}, EA 0x{:x}", vect, pc, ea)
hexdump(u32::try_from(pc).unwrap());
panic!("exception {:?} at PC 0x{:x}", e, u32::try_from(pc).unwrap())
}
}
}
}