occheung
/
artiq
forked from M-Labs/artiq
1
0
Fork 0
Code Pull Requests Activity

wrpll: use CONFIG_CLOCK_FREQUENCY and rtio_frequency in trim_dcxos

This commit is contained in:
Sebastien Bourdeauducq 2020-01-13 20:44:15 +08:00
parent ea3bce6fe3
commit e7ef23d30c
1 changed files with 2 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
artiq/firmware/libboard_artiq/wrpll.rs
View File

@ -357,7 +357,8 @@ fn trim_dcxos(f_helper: u32, f_main: u32, f_cdr: u32) -> Result<(i32, i32), &'st
const TIMER_WIDTH: u32 = 23; const TIMER_WIDTH: u32 = 23;
const COUNTER_DIV: u32 = 2; const COUNTER_DIV: u32 = 2;
const F_SYS: f64 = 125.0e6; const F_SYS: f64 = csr::CONFIG_CLOCK_FREQUENCY as f64;
#[cfg(rtio_frequency = "125.0")]
const F_MAIN: f64 = 125.0e6; const F_MAIN: f64 = 125.0e6;
const F_HELPER: f64 = F_MAIN * ((1 << 15) as f64)/((1<<15) as f64 + 1.0); const F_HELPER: f64 = F_MAIN * ((1 << 15) as f64)/((1<<15) as f64 + 1.0);