From dd03fdfd1a53bf58fe135280828be6a93a401bcb Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Sun, 2 Dec 2018 18:26:54 +0800 Subject: [PATCH] typo --- artiq/compiler/transforms/llvm_ir_generator.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/artiq/compiler/transforms/llvm_ir_generator.py b/artiq/compiler/transforms/llvm_ir_generator.py index 93b1bfc9b..d67d582ad 100644 --- a/artiq/compiler/transforms/llvm_ir_generator.py +++ b/artiq/compiler/transforms/llvm_ir_generator.py @@ -151,7 +151,7 @@ class LLVMIRGenerator: ]) assert self.lldatalayout in "eE" - self.little_endian = self.self.lldatalayout[0] == "e" + self.little_endian = self.lldatalayout[0] == "e" def needs_sret(self, lltyp, may_be_large=True): if isinstance(lltyp, ll.VoidType):