forked from M-Labs/artiq
spi: add runtime support
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8d7e92ebae
commit
d63a63531a
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@ -7,7 +7,7 @@ OBJECTS := isr.o clock.o rtiocrg.o flash_storage.o mailbox.o \
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session.o log.o analyzer.o moninj.o net_server.o bridge_ctl.o \
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session.o log.o analyzer.o moninj.o net_server.o bridge_ctl.o \
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ksupport_data.o kloader.o test_mode.o main.o
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ksupport_data.o kloader.o test_mode.o main.o
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OBJECTS_KSUPPORT := ksupport.o artiq_personality.o mailbox.o \
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OBJECTS_KSUPPORT := ksupport.o artiq_personality.o mailbox.o \
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bridge.o rtio.o ttl.o dds.o
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bridge.o rtio.o ttl.o dds.o spi.o
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CFLAGS += -I$(LIBALLOC_DIRECTORY) \
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CFLAGS += -I$(LIBALLOC_DIRECTORY) \
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-I$(MISOC_DIRECTORY)/software/include/dyld \
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-I$(MISOC_DIRECTORY)/software/include/dyld \
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@ -15,6 +15,7 @@
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#include "artiq_personality.h"
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#include "artiq_personality.h"
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#include "ttl.h"
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#include "ttl.h"
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#include "dds.h"
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#include "dds.h"
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#include "spi.h"
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#include "rtio.h"
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#include "rtio.h"
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double round(double x);
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double round(double x);
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@ -121,6 +122,9 @@ static const struct symbol runtime_exports[] = {
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{"dds_batch_exit", &dds_batch_exit},
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{"dds_batch_exit", &dds_batch_exit},
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{"dds_set", &dds_set},
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{"dds_set", &dds_set},
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{"spi_write", &spi_write},
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{"spi_read", &spi_read},
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{"cache_get", &cache_get},
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{"cache_get", &cache_get},
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{"cache_put", &cache_put},
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{"cache_put", &cache_put},
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@ -0,0 +1,50 @@
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#include <generated/csr.h>
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#include <stdio.h>
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#include "artiq_personality.h"
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#include "rtio.h"
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#include "log.h"
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#include "spi.h"
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#define DURATION_WRITE (1 << CONFIG_RTIO_FINE_TS_WIDTH)
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void spi_write(long long int timestamp, int channel, int addr,
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unsigned int data)
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{
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rtio_chan_sel_write(CONFIG_RTIO_SPI_CHANNEL + channel);
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rtio_o_address_write(addr);
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rtio_o_data_write(data);
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rtio_o_timestamp_write(timestamp);
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rtio_write_and_process_status(timestamp, channel);
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}
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unsigned int spi_read(long long int timestamp, int channel, int addr)
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{
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int status;
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long long int time_limit = timestamp + DURATION_WRITE;
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unsigned int r;
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spi_write(timestamp, channel, addr | SPI_WB_READ, 0);
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while((status = rtio_i_status_read())) {
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if(rtio_i_status_read() & RTIO_I_STATUS_OVERFLOW) {
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rtio_i_overflow_reset_write(1);
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artiq_raise_from_c("RTIOOverflow",
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"RTIO overflow at channel {0}",
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channel, 0, 0);
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}
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if(rtio_get_counter() >= time_limit) {
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/* check empty flag again to prevent race condition.
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* now we are sure that the time limit has been exceeded.
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*/
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if(rtio_i_status_read() & RTIO_I_STATUS_EMPTY)
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return -1;
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}
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/* input FIFO is empty - keep waiting */
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}
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r = rtio_i_data_read();
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rtio_i_re_write(1);
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return r;
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}
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@ -0,0 +1,20 @@
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#ifndef __SPI_H
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#define __SPI_H
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#include <hw/common.h>
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#include <generated/csr.h>
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#include <generated/mem.h>
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#define SPI_ADDR_DATA 0
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#define SPI_ADDR_XFER 1
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#define SPI_ADDR_CONFIG 2
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#define SPI_WB_READ (1 << 2)
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#define SPI_XFER_CS(x) (x)
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#define SPI_XFER_WRITE_LENGTH(x) ((x) << 16)
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#define SPI_XFER_READ_LENGTH(x) ((x) << 24)
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void spi_write(long long int timestamp, int channel, int address, unsigned int data);
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unsigned int spi_read(long long int timestamp, int channel, int address);
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#endif /* __SPI_H */
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