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examples: fix RTIO clocks to 125 MHz

This commit is contained in:
Harry Ho 2021-12-13 10:41:48 +08:00
parent 77c4d2f013
commit d3869c966e
4 changed files with 5 additions and 5 deletions

View File

@ -5,7 +5,7 @@ device_db = {
"type": "local", "type": "local",
"module": "artiq.coredevice.core", "module": "artiq.coredevice.core",
"class": "Core", "class": "Core",
"arguments": {"host": core_addr, "ref_period": 1/(8*150e6)} "arguments": {"host": core_addr, "ref_period": 1/(8*125e6)}
}, },
"core_log": { "core_log": {
"type": "controller", "type": "controller",

View File

@ -5,7 +5,7 @@ device_db = {
"type": "local", "type": "local",
"module": "artiq.coredevice.core", "module": "artiq.coredevice.core",
"class": "Core", "class": "Core",
"arguments": {"host": core_addr, "ref_period": 1/(8*150e6)} "arguments": {"host": core_addr, "ref_period": 1/(8*125e6)}
}, },
"core_log": { "core_log": {
"type": "controller", "type": "controller",
@ -69,7 +69,7 @@ device_db.update(
"arguments": { "arguments": {
"spi_device": "spi_urukul0", "spi_device": "spi_urukul0",
"io_update_device": "ttl_urukul0_io_update", "io_update_device": "ttl_urukul0_io_update",
"refclk": 150e6, "refclk": 125e6,
"clk_sel": 2 "clk_sel": 2
} }
} }

View File

@ -5,7 +5,7 @@ device_db = {
"type": "local", "type": "local",
"module": "artiq.coredevice.core", "module": "artiq.coredevice.core",
"class": "Core", "class": "Core",
"arguments": {"host": core_addr, "ref_period": 1/(8*150e6)} "arguments": {"host": core_addr, "ref_period": 1/(8*125e6)}
}, },
"core_log": { "core_log": {
"type": "controller", "type": "controller",

View File

@ -5,7 +5,7 @@ device_db = {
"type": "local", "type": "local",
"module": "artiq.coredevice.core", "module": "artiq.coredevice.core",
"class": "Core", "class": "Core",
"arguments": {"host": core_addr, "ref_period": 1/(8*150e6)} "arguments": {"host": core_addr, "ref_period": 1/(8*125e6)}
}, },
"core_log": { "core_log": {
"type": "controller", "type": "controller",