forked from M-Labs/artiq
sayma: update fmcdio_vhdci_eem demo
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8dfcd463aa
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d152506ecb
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@ -8,10 +8,15 @@ class Demo(EnvExperiment):
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self.setattr_device("fmcdio_dirctl")
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self.setattr_device("fmcdio_dirctl")
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self.ttls = [self.get_device("ttl" + str(i)) for i in range(8)]
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self.ttls = [self.get_device("ttl" + str(i)) for i in range(8)]
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self.setattr_device("urukul0_cpld")
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self.urukul_chs = [self.get_device("urukul0_ch" + str(i)) for i in range(4)]
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self.setattr_device("zotino0")
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self.dirctl_word = (
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self.dirctl_word = (
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shiftreg_bits(2, dio_bank0_out_pins) |
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shiftreg_bits(1, urukul_out_pins) |
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shiftreg_bits(2, dio_bank1_out_pins))
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shiftreg_bits(0, urukul_aux_out_pins) |
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shiftreg_bits(2, dio_bank0_out_pins | dio_bank1_out_pins) |
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shiftreg_bits(3, zotino_out_pins))
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@kernel
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@kernel
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def run(self):
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def run(self):
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@ -20,6 +25,17 @@ class Demo(EnvExperiment):
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self.fmcdio_dirctl.set(self.dirctl_word)
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self.fmcdio_dirctl.set(self.dirctl_word)
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delay(10*ms)
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delay(10*ms)
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self.urukul0_cpld.init()
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delay(10*ms)
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self.zotino0.init()
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delay(1*ms)
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for i in range(32):
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self.zotino0.write_dac(i, i/4)
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delay(1*ms)
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while True:
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while True:
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for ttl in self.ttls:
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for ttl in self.ttls:
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ttl.pulse(1*ms)
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ttl.pulse(100*ms)
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for urukul_ch in self.urukul_chs:
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urukul_ch.sw.pulse(100*ms)
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