si5324: fix usage of external CLKIN2 reference

artiq/firmware/libboard_artiq/si5324.rs

@@ -43,7 +43,8 @@ pub struct FrequencySettings {
     pub n2_ls: u32,
     pub n31: u32,
     pub n32: u32,
-    pub bwsel: u8
+    pub bwsel: u8,
+    pub crystal_ref: bool
 }
 
 fn map_frequency_settings(settings: &FrequencySettings) -> Result<FrequencySettings> {
@@ -201,7 +202,9 @@ pub fn setup(settings: &FrequencySettings) -> Result<()> {
     #[cfg(si5324_soft_reset)]
     soft_reset()?;
 
+    if settings.crystal_ref {
         write(0,   read(0)? | 0x40)?;                     // FREE_RUN=1
+    }
     write(2,   (read(2)? & 0x0f) | (s.bwsel << 4))?;
     write(21,  read(21)? & 0xfe)?;                        // CKSEL_PIN=0
     write(3,   (read(3)? & 0x3f) | (0b01 << 6) | 0x10)?;  // CKSEL_REG=b01 SQ_ICAL=1

artiq/firmware/runtime/main.rs

@@ -111,7 +111,6 @@ fn startup() {
 fn setup_si5324_free_running()
 {
     // 125MHz output, from 100MHz CLKIN2 reference, 9 Hz
-    // FIXME: needs !FREE_RUN at address 0x00
     #[cfg(all(rtio_frequency = "125.0", si5324_ext_ref))]
     const SI5324_SETTINGS: board_artiq::si5324::FrequencySettings
         = board_artiq::si5324::FrequencySettings {
@@ -121,7 +120,8 @@ fn setup_si5324_free_running()
         n2_ls  : 260,
         n31    : 65,
         n32    : 52,
-        bwsel  : 10
+        bwsel  : 10,
+        crystal_ref: false
     };
     // 125MHz output, from crystal, 7 Hz
     #[cfg(all(rtio_frequency = "125.0", not(si5324_ext_ref)))]
@@ -133,7 +133,8 @@ fn setup_si5324_free_running()
         n2_ls  : 19972,
         n31    : 4993,
         n32    : 4565,
-        bwsel  : 4
+        bwsel  : 4,
+        crystal_ref: true
     };
     // 150MHz output, from crystal
     #[cfg(all(rtio_frequency = "150.0", not(si5324_ext_ref)))]
@@ -145,7 +146,8 @@ fn setup_si5324_free_running()
         n2_ls  : 33732,
         n31    : 9370,
         n32    : 7139,
-        bwsel  : 3
+        bwsel  : 3,
+        crystal_ref: true
     };
     board_artiq::si5324::setup(&SI5324_SETTINGS).expect("cannot initialize Si5324");
 }

artiq/firmware/satman/main.rs

@@ -183,7 +183,8 @@ const SI5324_SETTINGS: si5324::FrequencySettings
     n2_ls  : 33732,
     n31    : 9370,
     n32    : 7139,
-    bwsel  : 3
+    bwsel  : 3,
+    crystal_ref: true
 };
 
 fn drtio_link_is_up() -> bool {

artiq/gateware/targets/kasli.py

@@ -230,7 +230,7 @@ class Opticlock(_StandaloneBase):
         _StandaloneBase.__init__(self, **kwargs)
 
         self.config["SI5324_FREE_RUNNING"] = None
-        # self.config["SI5324_EXT_REF"] = None
+        self.config["SI5324_EXT_REF"] = None
         self.config["RTIO_FREQUENCY"] = "125.0"
 
         platform = self.platform