From c26fa5eb90a3cafc9829e4eeea2ba76a9857cf26 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Robert=20J=C3=B6rdens?= <rj@quartiq.de>
Date: Mon, 5 Sep 2022 20:48:15 +0000
Subject: [PATCH] err out on tune_fifo_offset

---
 artiq/coredevice/phaser.py | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/artiq/coredevice/phaser.py b/artiq/coredevice/phaser.py
index caadc8fdc..472d8146f 100644
--- a/artiq/coredevice/phaser.py
+++ b/artiq/coredevice/phaser.py
@@ -791,6 +791,8 @@ class Phaser:
             if good & (1 << o):
                 sum += o
                 count += 1
+        if count == 0:
+            raise ValueError("no good fifo offset")
         best = ((sum // count) + offset) % 8
         self.dac_write(0x09, (config9 & 0x1fff) | (best << 13))
         return best