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test: dds → ad9914dds 

Prevent confusion with Urukul.
This commit is contained in:
Sebastien Bourdeauducq 2018-08-09 16:55:07 +08:00
parent bf78e0c7d2
commit bbc98410e4
3 changed files with 21 additions and 21 deletions
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10
artiq/examples/kc705_nist_clock/device_db.py
View File

@ -134,20 +134,20 @@ device_db = {
},
# AD9914 DDS
"dds0": {
"ad9914dds0": {
"type": "local",
"module": "artiq.coredevice.ad9914",
"class": "AD9914",
"arguments": {"sysclk": 3e9, "bus_channel": 27, "channel": 0},
"comment": "Comments work in DDS panel as well"
},
"dds1": {
"ad9914dds1": {
"type": "local",
"module": "artiq.coredevice.ad9914",
"class": "AD9914",
"arguments": {"sysclk": 3e9, "bus_channel": 27, "channel": 1}
},
"dds2": {
"ad9914dds2": {
"type": "local",
"module": "artiq.coredevice.ad9914",
"class": "AD9914",
@ -164,8 +164,8 @@ device_db = {
"loop_clock_in": "ttl7",
"pmt": "ttl3",
"bd_dds": "dds0",
"bd_dds": "ad9914dds0",
"bd_sw": "ttl0",
"bdd_dds": "dds1",
"bdd_dds": "ad9914dds1",
"bdd_sw": "ttl1"
}

10
artiq/examples/master/device_db.py
View File

@ -321,20 +321,20 @@ device_db = {
},
# AD9914 DDS
"dds0": {
"ad9914dds0": {
"type": "local",
"module": "artiq.coredevice.ad9914",
"class": "AD9914",
"arguments": {"sysclk": 3e9, "bus_channel": 39, "channel": 0},
"comment": "Comments work in DDS panel as well"
},
"dds1": {
"ad9914dds1": {
"type": "local",
"module": "artiq.coredevice.ad9914",
"class": "AD9914",
"arguments": {"sysclk": 3e9, "bus_channel": 39, "channel": 1}
},
"dds2": {
"ad9914dds2": {
"type": "local",
"module": "artiq.coredevice.ad9914",
"class": "AD9914",
@ -351,8 +351,8 @@ device_db = {
"loop_clock_in": "ttl7",
"pmt": "ttl3",
"bd_dds": "dds0",
"bd_dds": "ad9914dds0",
"bd_sw": "ttl0",
"bdd_dds": "dds1",
"bdd_dds": "ad9914dds1",
"bdd_sw": "ttl1"
}

22
artiq/test/coredevice/test_rtio.py
View File

@ -124,25 +124,25 @@ class PulseRate(EnvExperiment):
return
class PulseRateDDS(EnvExperiment):
class PulseRateAD9914DDS(EnvExperiment):
def build(self):
self.setattr_device("core")
self.setattr_device("dds0")
self.setattr_device("dds1")
self.setattr_device("ad9914dds0")
self.setattr_device("ad9914dds1")
@kernel
def run(self):
self.core.reset()
dt = self.core.seconds_to_mu(5*us)
freq = self.dds0.frequency_to_ftw(100*MHz)
freq = self.ad9914dds0.frequency_to_ftw(100*MHz)
while True:
delay(10*ms)
for i in range(1250):
try:
delay_mu(-self.dds0.set_duration_mu)
self.dds0.set_mu(freq)
delay_mu(self.dds0.set_duration_mu)
self.dds1.set_mu(freq)
delay_mu(-self.ad9914dds0.set_duration_mu)
self.ad9914dds0.set_mu(freq)
delay_mu(self.ad9914dds0.set_duration_mu)
self.ad9914dds1.set_mu(freq)
delay_mu(dt)
except RTIOUnderflow:
dt += 100
@ -395,9 +395,9 @@ class CoredeviceTest(ExperimentCase):
self.assertGreater(rate, 100*ns)
self.assertLess(rate, 700*ns)
def test_pulse_rate_dds(self):
"""Minimum interval for sustained DDS frequency switching"""
self.execute(PulseRateDDS)
def test_pulse_rate_ad9914_dds(self):
"""Minimum interval for sustained AD9914 DDS frequency switching"""
self.execute(PulseRateAD9914DDS)
rate = self.dataset_mgr.get("pulse_rate")
print(rate)
self.assertGreater(rate, 1*us)