forked from M-Labs/artiq
rtio: fix replace/sequence_error when fine_ts_width > 0
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@ -118,8 +118,10 @@ class _OutputManager(Module):
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sequence_error = Signal()
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nop = Signal()
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self.sync.rsys += [
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replace.eq(self.ev.timestamp == buf.timestamp[fine_ts_width:]),
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sequence_error.eq(self.ev.timestamp < buf.timestamp[fine_ts_width:])
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replace.eq(self.ev.timestamp[fine_ts_width:] \
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== buf.timestamp[fine_ts_width:]),
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sequence_error.eq(self.ev.timestamp[fine_ts_width:] \
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< buf.timestamp[fine_ts_width:])
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]
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if interface.suppress_nop:
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# disable NOP at reset: do not suppress a first write with all 0s
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