From a8a74d7840fa5dc7bf19a5ce52fb2303b4a92050 Mon Sep 17 00:00:00 2001
From: Sebastien Bourdeauducq <sb@m-labs.hk>
Date: Sat, 5 Mar 2016 00:19:59 +0800
Subject: [PATCH] targets/kc705: enable I2C for all hardware adapters

---
 artiq/gateware/targets/kc705.py | 27 +++++++++++----------------
 1 file changed, 11 insertions(+), 16 deletions(-)

diff --git a/artiq/gateware/targets/kc705.py b/artiq/gateware/targets/kc705.py
index 16ad41bf8..bfa778794 100755
--- a/artiq/gateware/targets/kc705.py
+++ b/artiq/gateware/targets/kc705.py
@@ -94,8 +94,11 @@ _ams101_dac = [
 
 class _NIST_Ions(MiniSoC, AMPSoC):
     csr_map = {
-        "timer_kernel": None,  # mapped on Wishbone instead
-        "rtio": None,  # mapped on Wishbone instead
+        # mapped on Wishbone instead
+        "timer_kernel": None,
+        "rtio": None,
+        "i2c": None,
+
         "rtio_crg": 13,
         "kernel_cpu": 14,
         "rtio_moninj": 15,
@@ -105,6 +108,7 @@ class _NIST_Ions(MiniSoC, AMPSoC):
     mem_map = {
         "timer_kernel":  0x10000000, # (shadow @0x90000000)
         "rtio":          0x20000000, # (shadow @0xa0000000)
+        "i2c":           0x30000000, # (shadow @0xb0000000)
         "mailbox":       0x70000000  # (shadow @0xf0000000)
     }
     mem_map.update(MiniSoC.mem_map)
@@ -131,6 +135,11 @@ class _NIST_Ions(MiniSoC, AMPSoC):
 
         self.platform.add_extension(_ams101_dac)
 
+        i2c = self.platform.request("i2c")
+        self.submodules.i2c = gpio.GPIOTristate([i2c.scl, i2c.sda])
+        self.register_kernel_cpu_csrdevice("i2c")
+        self.config["I2C_BUS_COUNT"] = 1
+
     def add_rtio(self, rtio_channels):
         self.submodules.rtio_crg = _RTIOCRG(self.platform, self.crg.cd_sys.clk)
         self.submodules.rtio = rtio.RTIO(rtio_channels)
@@ -293,15 +302,6 @@ class NIST_QC2(_NIST_Ions):
     NIST QC2 hardware, as used in Quantum I and Quantum II, with new backplane
     and 12 DDS channels. Current implementation for single backplane.
     """
-    csr_map = {
-        "i2c": None
-    }
-    csr_map.update(_NIST_Ions.csr_map)
-    mem_map = {
-        "i2c":  0x30000000 # (shadow @0xb0000000)
-    }
-    mem_map.update(_NIST_Ions.mem_map)
-
     def __init__(self, cpu_type="or1k", **kwargs):
         _NIST_Ions.__init__(self, cpu_type, **kwargs)
 
@@ -350,11 +350,6 @@ class NIST_QC2(_NIST_Ions):
         assert self.rtio.fine_ts_width <= 3
         self.config["DDS_RTIO_CLK_RATIO"] = 24 >> self.rtio.fine_ts_width
 
-        i2c = platform.request("i2c")
-        self.submodules.i2c = gpio.GPIOTristate([i2c.scl, i2c.sda])
-        self.register_kernel_cpu_csrdevice("i2c")
-        self.config["I2C_BUS_COUNT"] = 1
-
 
 def main():
     parser = argparse.ArgumentParser(