diff --git a/artiq/firmware/libboard_artiq/ad9154.rs b/artiq/firmware/libboard_artiq/ad9154.rs
index 717a06eb5..d232dcafc 100644
--- a/artiq/firmware/libboard_artiq/ad9154.rs
+++ b/artiq/firmware/libboard_artiq/ad9154.rs
@@ -327,8 +327,8 @@ pub fn setup(dacno: u8, linerate: u64) -> Result<(), &'static str> {
     // LMFCDel & LMFCVar were deduced from values of DYN_LINK_LATENCY_0
     // gathered from repeated power-cycles; see datasheet (Rev. C) p.44
     // "Link Delay Setup Example, Without Known Delay"
-    write(ad9154_reg::LMFC_DELAY_0, 10);
-    write(ad9154_reg::LMFC_DELAY_1, 10);
+    write(ad9154_reg::LMFC_DELAY_0, 14);
+    write(ad9154_reg::LMFC_DELAY_1, 14);
     write(ad9154_reg::LMFC_VAR_0, 4); // receive buffer delay
     write(ad9154_reg::LMFC_VAR_1, 4);
     write(ad9154_reg::SYNC_ERRWINDOW, 0); // +- 1/2 DAC clock