forked from M-Labs/artiq
Firmware: satman WRPLL
satman: enable WRPLL interrupt satman: add WRPLL interrupt handler satman: add main & helper si549 setup satman: add WRPLL select_recovered_clock
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0ac0e08170
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a10dd0520c
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@ -17,6 +17,8 @@ use core::convert::TryFrom;
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use board_misoc::{csr, ident, clock, uart_logger, i2c, pmp};
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use board_misoc::{csr, ident, clock, uart_logger, i2c, pmp};
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#[cfg(has_si5324)]
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#[cfg(has_si5324)]
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use board_artiq::si5324;
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use board_artiq::si5324;
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#[cfg(has_si549)]
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use board_artiq::si549;
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#[cfg(soc_platform = "kasli")]
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#[cfg(soc_platform = "kasli")]
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use board_misoc::irq;
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use board_misoc::irq;
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use board_artiq::{spi, drtioaux, drtio_routing};
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use board_artiq::{spi, drtioaux, drtio_routing};
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@ -597,6 +599,36 @@ const SI5324_SETTINGS: si5324::FrequencySettings
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crystal_as_ckin2: true
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crystal_as_ckin2: true
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};
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};
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#[cfg(all(has_si549, rtio_frequency = "125.0"))]
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const SI549_SETTINGS: si549::FrequencySetting = si549::FrequencySetting {
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main: si549::DividerConfig {
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hsdiv: 0x058,
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lsdiv: 0,
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fbdiv: 0x04815791F25,
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},
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helper: si549::DividerConfig {
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// 125MHz*32767/32768
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hsdiv: 0x058,
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lsdiv: 0,
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fbdiv: 0x04814E8F442,
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},
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};
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#[cfg(all(has_si549, rtio_frequency = "100.0"))]
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const SI549_SETTINGS: si549::FrequencySetting = si549::FrequencySetting {
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main: si549::DividerConfig {
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hsdiv: 0x06C,
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lsdiv: 0,
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fbdiv: 0x046C5F49797,
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},
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helper: si549::DividerConfig {
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// 100MHz*32767/32768
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hsdiv: 0x06C,
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lsdiv: 0,
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fbdiv: 0x046C5670BBD,
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},
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};
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#[cfg(not(soc_platform = "efc"))]
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#[cfg(not(soc_platform = "efc"))]
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fn sysclk_setup() {
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fn sysclk_setup() {
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let switched = unsafe {
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let switched = unsafe {
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@ -609,6 +641,9 @@ fn sysclk_setup() {
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else {
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else {
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#[cfg(has_si5324)]
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#[cfg(has_si5324)]
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si5324::setup(&SI5324_SETTINGS, si5324::Input::Ckin1).expect("cannot initialize Si5324");
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si5324::setup(&SI5324_SETTINGS, si5324::Input::Ckin1).expect("cannot initialize Si5324");
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#[cfg(has_si549)]
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si549::main_setup(&SI549_SETTINGS).expect("cannot initialize main Si549");
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info!("Switching sys clock, rebooting...");
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info!("Switching sys clock, rebooting...");
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// delay for clean UART log, wait until UART FIFO is empty
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// delay for clean UART log, wait until UART FIFO is empty
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clock::spin_us(3000);
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clock::spin_us(3000);
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@ -634,6 +669,8 @@ pub extern fn main() -> i32 {
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}
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}
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#[cfg(soc_platform = "kasli")]
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#[cfg(soc_platform = "kasli")]
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irq::enable_interrupts();
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irq::enable_interrupts();
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#[cfg(has_wrpll)]
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irq::enable(csr::WRPLL_INTERRUPT);
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clock::init();
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clock::init();
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uart_logger::ConsoleLogger::register();
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uart_logger::ConsoleLogger::register();
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@ -669,6 +706,9 @@ pub extern fn main() -> i32 {
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#[cfg(not(soc_platform = "efc"))]
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#[cfg(not(soc_platform = "efc"))]
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sysclk_setup();
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sysclk_setup();
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#[cfg(has_si549)]
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si549::helper_setup(&SI549_SETTINGS).expect("cannot initialize helper Si549");
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#[cfg(soc_platform = "efc")]
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#[cfg(soc_platform = "efc")]
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let mut io_expander;
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let mut io_expander;
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#[cfg(soc_platform = "efc")]
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#[cfg(soc_platform = "efc")]
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@ -758,6 +798,9 @@ pub extern fn main() -> i32 {
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si5324::siphaser::calibrate_skew().expect("failed to calibrate skew");
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si5324::siphaser::calibrate_skew().expect("failed to calibrate skew");
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}
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}
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#[cfg(has_wrpll)]
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si549::wrpll::select_recovered_clock(true);
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// various managers created here, so when link is dropped, DMA traces,
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// various managers created here, so when link is dropped, DMA traces,
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// analyzer logs, kernels are cleared and/or stopped for a clean slate
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// analyzer logs, kernels are cleared and/or stopped for a clean slate
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// on subsequent connections, without a manual intervention.
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// on subsequent connections, without a manual intervention.
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@ -825,6 +868,8 @@ pub extern fn main() -> i32 {
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info!("uplink is down, switching to local oscillator clock");
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info!("uplink is down, switching to local oscillator clock");
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#[cfg(has_si5324)]
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#[cfg(has_si5324)]
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si5324::siphaser::select_recovered_clock(false).expect("failed to switch clocks");
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si5324::siphaser::select_recovered_clock(false).expect("failed to switch clocks");
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#[cfg(has_wrpll)]
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si549::wrpll::select_recovered_clock(false);
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}
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}
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}
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}
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@ -864,23 +909,33 @@ fn enable_error_led() {
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pub extern fn exception(_regs: *const u32) {
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pub extern fn exception(_regs: *const u32) {
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let pc = mepc::read();
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let pc = mepc::read();
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let cause = mcause::read().cause();
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let cause = mcause::read().cause();
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match cause {
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mcause::Trap::Interrupt(_source) => {
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#[cfg(has_wrpll)]
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if irq::is_pending(csr::WRPLL_INTERRUPT) {
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si549::wrpll::interrupt_handler();
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}
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},
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fn hexdump(addr: u32) {
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mcause::Trap::Exception(e) => {
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let addr = (addr - addr % 4) as *const u32;
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fn hexdump(addr: u32) {
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let mut ptr = addr;
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let addr = (addr - addr % 4) as *const u32;
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println!("@ {:08p}", ptr);
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let mut ptr = addr;
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for _ in 0..4 {
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println!("@ {:08p}", ptr);
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print!("+{:04x}: ", ptr as usize - addr as usize);
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for _ in 0..4 {
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print!("{:08x} ", unsafe { *ptr }); ptr = ptr.wrapping_offset(1);
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print!("+{:04x}: ", ptr as usize - addr as usize);
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print!("{:08x} ", unsafe { *ptr }); ptr = ptr.wrapping_offset(1);
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print!("{:08x} ", unsafe { *ptr }); ptr = ptr.wrapping_offset(1);
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print!("{:08x} ", unsafe { *ptr }); ptr = ptr.wrapping_offset(1);
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print!("{:08x} ", unsafe { *ptr }); ptr = ptr.wrapping_offset(1);
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print!("{:08x}\n", unsafe { *ptr }); ptr = ptr.wrapping_offset(1);
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print!("{:08x} ", unsafe { *ptr }); ptr = ptr.wrapping_offset(1);
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print!("{:08x}\n", unsafe { *ptr }); ptr = ptr.wrapping_offset(1);
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}
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}
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hexdump(u32::try_from(pc).unwrap());
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let mtval = mtval::read();
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panic!("exception {:?} at PC 0x{:x}, trap value 0x{:x}", e, u32::try_from(pc).unwrap(), mtval)
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}
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}
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}
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}
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hexdump(u32::try_from(pc).unwrap());
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let mtval = mtval::read();
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panic!("exception {:?} at PC 0x{:x}, trap value 0x{:x}", cause, u32::try_from(pc).unwrap(), mtval)
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}
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}
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#[no_mangle]
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#[no_mangle]
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