occheung/artiq
1
0
Fork 0
forked from M-Labs/artiq
Code Pull Requests Activity

Zotino: increase delay after register read in init method to avoid underflows

Browse Source
This commit is contained in:
hartytp 2018-10-06 14:19:49 +01:00 committed by Sébastien Bourdeauducq
parent 86fe6b0594
commit 9a509e5070
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
artiq/coredevice/ad53xx.py
View File

@ -171,7 +171,7 @@ class AD53xx:
ctrl = self.read_reg(channel=0, op=AD53XX_READ_CONTROL)
if ctrl & 0b10000:
raise ValueError("DAC over temperature")
delay(15*us)
delay(25*us)
self.bus.write( # enable power and overtemperature shutdown
(AD53XX_CMD_SPECIAL | AD53XX_SPECIAL_CONTROL | 0b0010) << 8)
if not blind: