From 86fe6b05949e508b909695f2a78396e7c4f6d40a Mon Sep 17 00:00:00 2001
From: Sebastien Bourdeauducq <sb@m-labs.hk>
Date: Thu, 4 Oct 2018 23:20:09 +0800
Subject: [PATCH] kasli: add NUDT variant

---
 artiq/gateware/targets/kasli.py | 35 ++++++++++++++++++++++++++++++++-
 1 file changed, 34 insertions(+), 1 deletion(-)

diff --git a/artiq/gateware/targets/kasli.py b/artiq/gateware/targets/kasli.py
index ef454235a..34f0241dd 100755
--- a/artiq/gateware/targets/kasli.py
+++ b/artiq/gateware/targets/kasli.py
@@ -456,6 +456,39 @@ class WIPM(_StandaloneBase):
         self.add_rtio(self.rtio_channels)
 
 
+class NUDT(_StandaloneBase):
+    # Like Tester, but fewer peripherals and newer Sampler
+    def __init__(self, hw_rev=None, **kwargs):
+        if hw_rev is None:
+            hw_rev = "v1.1"
+        _StandaloneBase.__init__(self, hw_rev=hw_rev, **kwargs)
+
+        self.config["SI5324_AS_SYNTHESIZER"] = None
+        # self.config["SI5324_EXT_REF"] = None
+        self.config["RTIO_FREQUENCY"] = "125.0"
+        if hw_rev == "v1.0":
+            # EEM clock fan-out from Si5324, not MMCX
+            self.comb += self.platform.request("clk_sel").eq(1)
+
+        self.rtio_channels = []
+        eem.DIO.add_std(self, 5,
+            ttl_serdes_7series.InOut_8X, ttl_serdes_7series.Output_8X)
+        eem.Urukul.add_std(self, 0, 1, ttl_serdes_7series.Output_8X)
+        eem.Sampler.add_std(self, 2, 3, ttl_serdes_7series.Output_8X)
+        eem.Zotino.add_std(self, 4, ttl_serdes_7series.Output_8X)
+
+        for i in (1, 2):
+            sfp_ctl = self.platform.request("sfp_ctl", i)
+            phy = ttl_simple.Output(sfp_ctl.led)
+            self.submodules += phy
+            self.rtio_channels.append(rtio.Channel.from_phy(phy))
+
+        self.config["HAS_RTIO_LOG"] = None
+        self.config["RTIO_LOG_CHANNEL"] = len(self.rtio_channels)
+        self.rtio_channels.append(rtio.LogChannel())
+        self.add_rtio(self.rtio_channels)
+
+
 class PTB(_StandaloneBase):
     """PTB Kasli variant
 
@@ -997,7 +1030,7 @@ def main():
     soc_kasli_args(parser)
     parser.set_defaults(output_dir="artiq_kasli")
     variants = {cls.__name__.lower(): cls for cls in [
-        Opticlock, SUServo, SYSU, MITLL, MITLL2, USTC, Tsinghua, WIPM, PTB, HUB, LUH,
+        Opticlock, SUServo, SYSU, MITLL, MITLL2, USTC, Tsinghua, WIPM, NUDT, PTB, HUB, LUH,
         VLBAIMaster, VLBAISatellite, Tester, Master, Satellite]}
     parser.add_argument("-V", "--variant", default="opticlock",
                         help="variant: {} (default: %(default)s)".format(