forked from M-Labs/artiq
urukul: proto 8
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@ -70,11 +70,11 @@ def urukul_sta_ifc_mode(sta):
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@kernel
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@kernel
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def urukul_sta_proto_rev(sta):
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def urukul_sta_proto_rev(sta):
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return (sta >> STA_PROTO_REV) & 0xff
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return (sta >> STA_PROTO_REV) & 0x7f
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# supported hardware and CPLD code version
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# supported hardware and CPLD code version
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STA_PROTO_REV_MATCH = 0x07
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STA_PROTO_REV_MATCH = 0x08
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# chip select (decoded)
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# chip select (decoded)
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CS_CFG = 1
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CS_CFG = 1
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@ -112,7 +112,6 @@ class CPLD:
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@kernel
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@kernel
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def sta_read(self):
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def sta_read(self):
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self.cfg_write(self.cfg_reg) # to latch STA
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self.bus.set_config_mu(_SPI_CONFIG, _SPIT_CFG_WR, _SPIT_CFG_RD)
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self.bus.set_config_mu(_SPI_CONFIG, _SPIT_CFG_WR, _SPIT_CFG_RD)
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self.bus.set_xfer(CS_CFG, 0, 24)
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self.bus.set_xfer(CS_CFG, 0, 24)
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self.bus.write(self.cfg_reg << 8)
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self.bus.write(self.cfg_reg << 8)
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