From 67ca48fa8414c7316a10efc8359952f717487efa Mon Sep 17 00:00:00 2001
From: ciciwu <89900858+ciciwu213@users.noreply.github.com>
Date: Tue, 8 Mar 2022 19:03:47 +0800
Subject: [PATCH] manual: fix formatting (#1865)

---
 doc/manual/core_device.rst | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/doc/manual/core_device.rst b/doc/manual/core_device.rst
index fa3466d32..6ba064e52 100644
--- a/doc/manual/core_device.rst
+++ b/doc/manual/core_device.rst
@@ -165,10 +165,12 @@ Clocking
 ++++++++
 
 The KC705 in standalone variants supports an internal 125 MHz RTIO clock (based on its crystal oscillator, or external reference for PLL for DRTIO variants) and an external clock, that can be selected using the ``rtio_clock`` configuration entry. Valid values are:
+
     * ``int_125`` - internal crystal oscillator, 125 MHz output (default),
     * ``ext0_bypass`` - external clock.
 
 KC705 in DRTIO variants and Kasli generates the RTIO clock using a PLL locked either to an internal crystal or to an external frequency reference. Valid values are:
+
     * ``int_125`` - internal crystal oscillator using PLL, 125 MHz output (default),
     * ``int_100`` - internal crystal oscillator using PLL, 100 MHz output,
     * ``int_150`` - internal crystal oscillator using PLL, 150 MHz output,