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targets/kc705: do not depend on particular Migen generated signal names

This commit is contained in:
Sebastien Bourdeauducq 2015-04-11 21:46:57 +08:00
parent bdd02a064e
commit 601f593ac4
1 changed files with 3 additions and 3 deletions
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6
soc/targets/artiq_kc705.py
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@ -75,11 +75,11 @@ class _Peripherals(MiniSoC):
if isinstance(platform.toolchain, XilinxVivadoToolchain): if isinstance(platform.toolchain, XilinxVivadoToolchain):
platform.add_platform_command(""" platform.add_platform_command("""
create_clock -name rsys_clk -period 8.0 [get_nets rsys_clk] create_clock -name rsys_clk -period 8.0 [get_nets {rsys_clk}]
create_clock -name rio_clk -period 8.0 [get_nets rio_clk] create_clock -name rio_clk -period 8.0 [get_nets {rio_clk}]
set_false_path -from [get_clocks rsys_clk] -to [get_clocks rio_clk] set_false_path -from [get_clocks rsys_clk] -to [get_clocks rio_clk]
set_false_path -from [get_clocks rio_clk] -to [get_clocks rsys_clk] set_false_path -from [get_clocks rio_clk] -to [get_clocks rsys_clk]
""") """, rsys_clk=self.rtio.cd_rsys.clk, rio_clk=self.rtio.cd_rio.clk)
class UP(_Peripherals): class UP(_Peripherals):
def __init__(self, *args, **kwargs): def __init__(self, *args, **kwargs):