From 5f5227f01f9fbede73d9b0fb5954412623fc5f90 Mon Sep 17 00:00:00 2001 From: Robert Jordens Date: Tue, 28 Jul 2015 16:16:49 -0600 Subject: [PATCH] ttl: add timestamp() --- artiq/coredevice/ttl.py | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/artiq/coredevice/ttl.py b/artiq/coredevice/ttl.py index 078dc4bb2..b2399786a 100644 --- a/artiq/coredevice/ttl.py +++ b/artiq/coredevice/ttl.py @@ -196,13 +196,23 @@ class TTLInOut: @kernel def timestamp_mu(self): - """Poll the RTIO input and returns an event timestamp, according to - the gating. + """Poll the RTIO input and returns an event timestamp (in machine + units), according to the gating. If the gate is permanently closed, returns a negative value. """ return syscall("ttl_get", self.channel, self.i_previous_timestamp) + @kernel + def timestamp(self): + """Poll the RTIO input and returns an event timestamp (in seconds), + according to the gating. + + If the gate is permanently closed, returns a negative value. + """ + return mu_to_seconds( + syscall("ttl_get", self.channel, self.i_previous_timestamp)) + class TTLClockGen: """RTIO TTL clock generator driver.