forked from M-Labs/artiq
add tester support, refactor gateware mode
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0e4a87826c
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@ -9,6 +9,10 @@ from artiq.coredevice.trf372017 import TRF372017
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PHASER_BOARD_ID = 19
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PHASER_GW_BASE = 1
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PHASER_GW_MIQRO = 2
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PHASER_ADDR_BOARD_ID = 0x00
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PHASER_ADDR_HW_REV = 0x01
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PHASER_ADDR_GW_REV = 0x02
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@ -222,7 +226,7 @@ class Phaser:
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def __init__(self, dmgr, channel_base, miso_delay=1, tune_fifo_offset=True,
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clk_sel=0, sync_dly=0, dac=None, trf0=None, trf1=None,
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mode="base", core_device="core"):
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core_device="core"):
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self.channel_base = channel_base
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self.core = dmgr.get(core_device)
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# TODO: auto-align miso-delay in phy
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@ -235,6 +239,7 @@ class Phaser:
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self.clk_sel = clk_sel
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self.tune_fifo_offset = tune_fifo_offset
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self.sync_dly = sync_dly
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self.gw_rev = -1 # discovered in init()
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self.dac_mmap = DAC34H84(dac).get_mmap()
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@ -258,12 +263,10 @@ class Phaser:
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delay(.1*ms) # slack
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is_baseband = hw_rev & PHASER_HW_REV_VARIANT
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gw_rev = self.read8(PHASER_ADDR_GW_REV)
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self.gw_rev = self.read8(PHASER_ADDR_GW_REV)
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if debug:
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print("gw_rev:", gw_rev)
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print("gw_rev:", self.gw_rev)
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self.core.break_realtime()
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is_base = gw_rev == 1
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is_miqro = gw_rev == 2
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delay(.1*ms) # slack
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# allow a few errors during startup and alignment since boot
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@ -384,7 +387,7 @@ class Phaser:
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channel.set_servo(profile=0, enable=0, hold=1)
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if is_base:
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if self.gw_rev == PHASER_GW_BASE:
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# test oscillators and DUC
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for i in range(len(channel.oscillator)):
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oscillator = channel.oscillator[i]
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@ -412,7 +415,7 @@ class Phaser:
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abs(data_i - data_q) > 2):
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raise ValueError("DUC+oscillator phase/amplitude test failed")
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if is_miqro:
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if self.gw_rev == PHASER_GW_MIQRO:
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channel.miqro.reset()
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if is_baseband:
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@ -560,6 +560,12 @@ class PeripheralManager:
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def process_phaser(self, rtio_offset, peripheral):
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mode = peripheral.get("mode", "base")
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if mode == "miqro":
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dac = ', "dac": {"pll_m": 16, "pll_n": 3, "interpolation": 2}'
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n_channels = 3
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else:
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dac = ""
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n_channels = 5
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self.gen("""
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device_db["{name}"] = {{
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"type": "local",
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@ -567,15 +573,13 @@ class PeripheralManager:
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"class": "Phaser",
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"arguments": {{
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"channel_base": 0x{channel:06x},
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"miso_delay": 1,
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"mode": "{mode}"
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"miso_delay": 1{dac}
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}}
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}}""",
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name=self.get_name("phaser"),
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mode=mode,
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dac=dac,
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channel=rtio_offset)
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rtio_channels = {"base": 5, "miqro": 3}[mode]
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return rtio_channels
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return n_channels
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def process_hvamp(self, rtio_offset, peripheral):
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hvamp_name = self.get_name("hvamp")
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@ -570,20 +570,33 @@ class SinaraTester(EnvExperiment):
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self.core.break_realtime()
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phaser.init()
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delay(1*ms)
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phaser.channel[0].set_duc_frequency(duc)
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phaser.channel[0].set_duc_cfg()
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phaser.channel[0].set_att(6*dB)
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phaser.channel[1].set_duc_frequency(-duc)
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phaser.channel[1].set_duc_cfg()
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phaser.channel[1].set_att(6*dB)
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phaser.duc_stb()
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delay(1*ms)
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for i in range(len(osc)):
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phaser.channel[0].oscillator[i].set_frequency(osc[i])
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phaser.channel[0].oscillator[i].set_amplitude_phase(.2)
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phaser.channel[1].oscillator[i].set_frequency(-osc[i])
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phaser.channel[1].oscillator[i].set_amplitude_phase(.2)
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if phaser.gw_rev == 1: # base
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phaser.channel[0].set_duc_frequency(duc)
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phaser.channel[0].set_duc_cfg()
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phaser.channel[0].set_att(6*dB)
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phaser.channel[1].set_duc_frequency(-duc)
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phaser.channel[1].set_duc_cfg()
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phaser.channel[1].set_att(6*dB)
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phaser.duc_stb()
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delay(1*ms)
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for i in range(len(osc)):
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phaser.channel[0].oscillator[i].set_frequency(osc[i])
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phaser.channel[0].oscillator[i].set_amplitude_phase(.2)
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phaser.channel[1].oscillator[i].set_frequency(-osc[i])
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phaser.channel[1].oscillator[i].set_amplitude_phase(.2)
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delay(1*ms)
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elif phaser.gw_rev == 2: # miqro
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for ch in range(2):
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delay(1*ms)
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phaser.channel[ch].set_att(6*dB)
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phaser.channel[ch].miqro.set_window(
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start=0x00, iq=[[1., 0.]], order=0, tail=0)
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sign = 1. - 2.*ch
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for i in range(len(osc)):
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phaser.channel[ch].miqro.set_profile(osc, profile=1,
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frequency=sign*(duc + osc[i]), amplitude=1./len(osc))
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phaser.channel[ch].miqro.pulse(
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window=0x000, profiles=[1 for _ in range(len(osc))])
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@kernel
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def phaser_led_wave(self, phasers):
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