diff --git a/artiq/gateware/serwb/etherbone.py b/artiq/gateware/serwb/etherbone.py
index 231299bed..d69baf923 100644
--- a/artiq/gateware/serwb/etherbone.py
+++ b/artiq/gateware/serwb/etherbone.py
@@ -503,7 +503,8 @@ class _EtherboneRecordSender(Module):
 
         # # #
 
-        pbuffer = stream.SyncFIFO(etherbone_mmap_description(32), buffer_depth)
+        pbuffer = stream.SyncFIFO(etherbone_mmap_description(32), buffer_depth,
+                                  buffered=True)
         self.submodules += pbuffer
         self.comb += sink.connect(pbuffer.sink)
 
diff --git a/artiq/gateware/serwb/packet.py b/artiq/gateware/serwb/packet.py
index a1d2b00fb..c7650087a 100644
--- a/artiq/gateware/serwb/packet.py
+++ b/artiq/gateware/serwb/packet.py
@@ -1,12 +1,9 @@
 from math import ceil
-from copy import copy
-from collections import OrderedDict
 
 from migen import *
 from migen.genlib.misc import WaitTimer
 
 from misoc.interconnect import stream
-from misoc.interconnect.stream import EndpointDescription
 
 
 def reverse_bytes(signal):