forked from M-Labs/artiq
firmware: make i2c busno u8
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parent
13c45c8766
commit
4f97d00e79
@ -2,16 +2,16 @@ use csr;
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use clock;
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fn half_period() { clock::spin_us(100) }
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fn sda_bit(busno: u32) -> u8 { 1 << (2 * busno + 1) }
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fn scl_bit(busno: u32) -> u8 { 1 << (2 * busno) }
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fn sda_bit(busno: u8) -> u8 { 1 << (2 * busno + 1) }
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fn scl_bit(busno: u8) -> u8 { 1 << (2 * busno) }
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fn sda_i(busno: u32) -> bool {
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fn sda_i(busno: u8) -> bool {
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unsafe {
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csr::i2c::in_read() & sda_bit(busno) != 0
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}
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}
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fn sda_oe(busno: u32, oe: bool) {
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fn sda_oe(busno: u8, oe: bool) {
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unsafe {
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let reg = csr::i2c::oe_read();
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let reg = if oe { reg | sda_bit(busno) } else { reg & !sda_bit(busno) };
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@ -19,7 +19,7 @@ fn sda_oe(busno: u32, oe: bool) {
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}
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}
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fn sda_o(busno: u32, o: bool) {
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fn sda_o(busno: u8, o: bool) {
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unsafe {
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let reg = csr::i2c::out_read();
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let reg = if o { reg | sda_bit(busno) } else { reg & !sda_bit(busno) };
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@ -27,7 +27,7 @@ fn sda_o(busno: u32, o: bool) {
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}
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}
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fn scl_oe(busno: u32, oe: bool) {
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fn scl_oe(busno: u8, oe: bool) {
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unsafe {
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let reg = csr::i2c::oe_read();
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let reg = if oe { reg | scl_bit(busno) } else { reg & !scl_bit(busno) };
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@ -35,7 +35,7 @@ fn scl_oe(busno: u32, oe: bool) {
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}
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}
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fn scl_o(busno: u32, o: bool) {
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fn scl_o(busno: u8, o: bool) {
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unsafe {
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let reg = csr::i2c::out_read();
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let reg = if o { reg | scl_bit(busno) } else { reg & !scl_bit(busno) };
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@ -45,6 +45,7 @@ fn scl_o(busno: u32, o: bool) {
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pub fn init() {
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for busno in 0..csr::CONFIG_I2C_BUS_COUNT {
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let busno = busno as u8;
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// Set SCL as output, and high level
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scl_o(busno, true);
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scl_oe(busno, true);
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@ -62,7 +63,7 @@ pub fn init() {
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}
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}
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pub fn start(busno: u32) {
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pub fn start(busno: u8) {
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// Set SCL high then SDA low
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scl_o(busno, true);
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half_period();
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@ -70,7 +71,7 @@ pub fn start(busno: u32) {
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half_period();
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}
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pub fn restart(busno: u32) {
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pub fn restart(busno: u8) {
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// Set SCL low then SDA high */
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scl_o(busno, false);
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half_period();
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@ -80,7 +81,7 @@ pub fn restart(busno: u32) {
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start(busno);
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}
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pub fn stop(busno: u32) {
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pub fn stop(busno: u8) {
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// First, make sure SCL is low, so that the target releases the SDA line
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scl_o(busno, false);
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half_period();
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@ -92,7 +93,7 @@ pub fn stop(busno: u32) {
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half_period();
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}
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pub fn write(busno: u32, data: u8) -> bool {
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pub fn write(busno: u8, data: u8) -> bool {
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// MSB first
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for bit in (0..8).rev() {
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// Set SCL low and set our bit on SDA
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@ -115,7 +116,7 @@ pub fn write(busno: u32, data: u8) -> bool {
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!sda_i(busno)
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}
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pub fn read(busno: u32, ack: bool) -> u8 {
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pub fn read(busno: u8, ack: bool) -> u8 {
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// Set SCL low first, otherwise setting SDA as input may cause a transition
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// on SDA with SCL high which will be interpreted as START/STOP condition.
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scl_o(busno, false);
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@ -1,7 +1,7 @@
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use i2c;
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use clock;
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const BUSNO: u32 = 0;
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const BUSNO: u8 = 0;
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const ADDRESS: u8 = 0x68;
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#[cfg(soc_platform = "kc705")]
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@ -242,20 +242,20 @@ extern fn cache_put(key: *const u8, list: ArtiqList<i32>) {
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}
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extern fn i2c_start(busno: i32) {
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send(&I2CStartRequest { busno: busno as u32 });
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send(&I2CStartRequest { busno: busno as u8 });
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}
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extern fn i2c_stop(busno: i32) {
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send(&I2CStopRequest { busno: busno as u32 });
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send(&I2CStopRequest { busno: busno as u8 });
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}
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extern fn i2c_write(busno: i32, data: i8) -> bool {
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send(&I2CWriteRequest { busno: busno as u32, data: data as u8 });
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send(&I2CWriteRequest { busno: busno as u8, data: data as u8 });
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recv!(&I2CWriteReply { ack } => ack)
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}
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extern fn i2c_read(busno: i32, ack: bool) -> i8 {
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send(&I2CReadRequest { busno: busno as u32, ack: ack });
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send(&I2CReadRequest { busno: busno as u8, ack: ack });
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recv!(&I2CReadReply { data } => data) as i8
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}
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@ -57,11 +57,11 @@ pub enum Message<'a> {
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CachePutRequest { key: &'a str, value: &'a [i32] },
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CachePutReply { succeeded: bool },
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I2CStartRequest { busno: u32 },
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I2CStopRequest { busno: u32 },
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I2CWriteRequest { busno: u32, data: u8 },
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I2CStartRequest { busno: u8 },
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I2CStopRequest { busno: u8 },
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I2CWriteRequest { busno: u8, data: u8 },
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I2CWriteReply { ack: bool },
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I2CReadRequest { busno: u32, ack: bool },
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I2CReadRequest { busno: u8, ack: bool },
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I2CReadReply { data: u8 },
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Log(fmt::Arguments<'a>),
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