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analyzer: adapt to TSC changes

This commit is contained in:
Sebastien Bourdeauducq 2018-09-05 12:06:20 +08:00
parent 15b16695c6
commit 4e4398afa6
1 changed files with 6 additions and 6 deletions
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12
artiq/gateware/rtio/analyzer.py
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@ -43,7 +43,7 @@ assert layout_len(stopped_layout) == message_len
class MessageEncoder(Module, AutoCSR): class MessageEncoder(Module, AutoCSR):
def __init__(self, cri, enable): def __init__(self, tsc, cri, enable):
self.source = stream.Endpoint([("data", message_len)]) self.source = stream.Endpoint([("data", message_len)])
self.overflow = CSRStatus() self.overflow = CSRStatus()
@ -67,7 +67,7 @@ class MessageEncoder(Module, AutoCSR):
self.comb += [ self.comb += [
input_output.channel.eq(cri.chan_sel), input_output.channel.eq(cri.chan_sel),
input_output.address_padding.eq(cri.o_address), input_output.address_padding.eq(cri.o_address),
input_output.rtio_counter.eq(cri.counter), input_output.rtio_counter.eq(tsc.full_ts_cri),
If(cri.cmd == cri_commands["write"], If(cri.cmd == cri_commands["write"],
input_output.message_type.eq(MessageType.output.value), input_output.message_type.eq(MessageType.output.value),
input_output.timestamp.eq(cri.timestamp), input_output.timestamp.eq(cri.timestamp),
@ -85,7 +85,7 @@ class MessageEncoder(Module, AutoCSR):
self.comb += [ self.comb += [
exception.message_type.eq(MessageType.exception.value), exception.message_type.eq(MessageType.exception.value),
exception.channel.eq(cri.chan_sel), exception.channel.eq(cri.chan_sel),
exception.rtio_counter.eq(cri.counter), exception.rtio_counter.eq(tsc.full_ts_cri),
] ]
just_written = Signal() just_written = Signal()
self.sync += just_written.eq(cri.cmd == cri_commands["write"]) self.sync += just_written.eq(cri.cmd == cri_commands["write"])
@ -103,7 +103,7 @@ class MessageEncoder(Module, AutoCSR):
stopped = Record(stopped_layout) stopped = Record(stopped_layout)
self.comb += [ self.comb += [
stopped.message_type.eq(MessageType.stopped.value), stopped.message_type.eq(MessageType.stopped.value),
stopped.rtio_counter.eq(cri.counter), stopped.rtio_counter.eq(tsc.full_ts_cri),
] ]
enable_r = Signal() enable_r = Signal()
@ -193,13 +193,13 @@ class DMAWriter(Module, AutoCSR):
class Analyzer(Module, AutoCSR): class Analyzer(Module, AutoCSR):
def __init__(self, cri, membus, fifo_depth=128): def __init__(self, tsc, cri, membus, fifo_depth=128):
# shutdown procedure: set enable to 0, wait until busy=0 # shutdown procedure: set enable to 0, wait until busy=0
self.enable = CSRStorage() self.enable = CSRStorage()
self.busy = CSRStatus() self.busy = CSRStatus()
self.submodules.message_encoder = MessageEncoder( self.submodules.message_encoder = MessageEncoder(
cri, self.enable.storage) tsc, cri, self.enable.storage)
self.submodules.fifo = stream.SyncFIFO( self.submodules.fifo = stream.SyncFIFO(
[("data", message_len)], fifo_depth, True) [("data", message_len)], fifo_depth, True)
self.submodules.converter = stream.Converter( self.submodules.converter = stream.Converter(