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slave_fpga: board_misoc

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Robert Jördens 2018-06-09 20:03:22 +08:00 committed by Robert Jördens
parent cb6e44b23a
commit 4912f53ab4
1 changed files with 1 additions and 1 deletions
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artiq/firmware/libboard_artiq/slave_fpga.rs
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@ -1,4 +1,4 @@
use board::{csr, clock}; use board_misoc::{csr, clock};
use core::slice; use core::slice;
use byteorder::{ByteOrder, BigEndian}; use byteorder::{ByteOrder, BigEndian};