From 47312e55d376c142a5deb046d96a6ae64758a730 Mon Sep 17 00:00:00 2001
From: Sebastien Bourdeauducq <sb@m-labs.hk>
Date: Mon, 28 Jan 2019 13:43:28 +0800
Subject: [PATCH] sayma: set RTIO_FREQUENCY in MasterDAC

---
 artiq/gateware/targets/sayma_amc.py | 1 +
 1 file changed, 1 insertion(+)

diff --git a/artiq/gateware/targets/sayma_amc.py b/artiq/gateware/targets/sayma_amc.py
index c30a2eede..4f8bc554f 100755
--- a/artiq/gateware/targets/sayma_amc.py
+++ b/artiq/gateware/targets/sayma_amc.py
@@ -153,6 +153,7 @@ class MasterDAC(MiniSoC, AMPSoC, RTMCommon):
         self.config["HAS_SI5324"] = None
         self.config["SI5324_AS_SYNTHESIZER"] = None
         self.config["SI5324_SAYMA_REF"] = None
+        self.config["RTIO_FREQUENCY"] = str(rtio_clk_freq/1e6)
         # ensure pins are properly biased and terminated
         si5324_clkout = platform.request("si5324_clkout", 0)
         self.specials += Instance(