occheung
/
artiq
forked from M-Labs/artiq
1
0
Fork 0
Code Pull Requests Activity

core: connect lazily to analyzer proxy 

Otherwise artiq_compile and other uses of Core that does not access hardware/network may fail.
This commit is contained in:
Sebastien Bourdeauducq 2023-12-13 13:46:45 +08:00
parent 85850ad9e8
commit 402a5d3376
1 changed files with 5 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
artiq/coredevice/core.py
View File

@ -98,15 +98,13 @@ class Core:
self.comm = CommKernelDummy()
else:
self.comm = CommKernel(host)
if analyzer_proxy is None:
self.analyzer_proxy = None
else:
self.analyzer_proxy = dmgr.get(analyzer_proxy)
self.analyzer_proxy_name = analyzer_proxy
self.first_run = True
self.dmgr = dmgr
self.core = self
self.comm.core = self
self.analyzer_proxy = None
def close(self):
self.comm.close()
@ -306,6 +304,9 @@ class Core:
analyzer proxy fails. In the latter case, more details would be
available in the proxy log.
"""
if self.analyzer_proxy is None:
if self.analyzer_proxy_name is not None:
self.analyzer_proxy = self.dmgr.get(self.analyzer_proxy_name)
if self.analyzer_proxy is None:
raise IOError("No analyzer proxy configured")
else: