From 3f631c417d3b86c229e360b357a0e59c16dd6f2f Mon Sep 17 00:00:00 2001 From: occheung Date: Mon, 14 Dec 2020 12:42:40 +0800 Subject: [PATCH] artiq_ddb_template: mirny_cpld: add refclk, clk_sel args Signed-off-by: occheung --- artiq/frontend/artiq_ddb_template.py | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/artiq/frontend/artiq_ddb_template.py b/artiq/frontend/artiq_ddb_template.py index c8088753e..8c19cacd3 100755 --- a/artiq/frontend/artiq_ddb_template.py +++ b/artiq/frontend/artiq_ddb_template.py @@ -273,9 +273,15 @@ class PeripheralManager: "type": "local", "module": "artiq.coredevice.mirny", "class": "Mirny", - "arguments": {{"spi_device": "spi_{name}"}}, + "arguments": {{ + "spi_device": "spi_{name}", + "refclk": {refclk}, + "clk_sel": {clk_sel} + }}, }}""", - name=mirny_name) + name=mirny_name, + refclk=peripheral.get("refclk", self.master_description.get("rtio_frequency", 125e6)), + clk_sel=peripheral["clk_sel"]) return next(channel)