forked from M-Labs/artiq
parent
3222f5036f
commit
3bc0e32dc0
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@ -21,6 +21,13 @@ class Config:
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Exposes the configurable quantities of a single SAWG channel.
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Exposes the configurable quantities of a single SAWG channel.
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Access to the configuration registers for a SAWG channel can not
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be concurrent. There must be at least :attr:_rtio_interval` machine
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units of delay between accesses. Replacement is not supported and will be
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lead to an ``RTIOCollision`` as this is likely a programming error.
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All methods therefore advance the timeline by the duration of one
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configuration register transfer.
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:param channel: RTIO channel number of the channel.
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:param channel: RTIO channel number of the channel.
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:param core: Core device.
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:param core: Core device.
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"""
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"""
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@ -53,6 +60,7 @@ class Config:
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:param n: Current value of the counter. Default: ``0``.
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:param n: Current value of the counter. Default: ``0``.
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"""
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"""
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rtio_output(now_mu(), self.channel, _SAWG_DIV, div | (n << 16))
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rtio_output(now_mu(), self.channel, _SAWG_DIV, div | (n << 16))
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delay_mu(self._rtio_interval)
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@kernel
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@kernel
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def set_clr(self, clr0: TInt32, clr1: TInt32, clr2: TInt32):
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def set_clr(self, clr0: TInt32, clr1: TInt32, clr2: TInt32):
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@ -92,6 +100,7 @@ class Config:
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"""
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"""
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rtio_output(now_mu(), self.channel, _SAWG_CLR, clr0 |
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rtio_output(now_mu(), self.channel, _SAWG_CLR, clr0 |
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(clr1 << 1) | (clr2 << 2))
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(clr1 << 1) | (clr2 << 2))
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delay_mu(self._rtio_interval)
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@kernel
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@kernel
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def set_iq_en(self, i_enable: TInt32, q_enable: TInt32):
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def set_iq_en(self, i_enable: TInt32, q_enable: TInt32):
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@ -118,6 +127,7 @@ class Config:
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"""
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"""
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rtio_output(now_mu(), self.channel, _SAWG_IQ_EN, i_enable |
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rtio_output(now_mu(), self.channel, _SAWG_IQ_EN, i_enable |
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(q_enable << 1))
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(q_enable << 1))
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delay_mu(self._rtio_interval)
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@kernel
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@kernel
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def set_duc_max_mu(self, limit: TInt32):
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def set_duc_max_mu(self, limit: TInt32):
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@ -132,21 +142,25 @@ class Config:
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.. seealso:: :meth:`set_duc_max`
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.. seealso:: :meth:`set_duc_max`
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"""
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"""
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rtio_output(now_mu(), self.channel, _SAWG_DUC_MAX, limit)
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rtio_output(now_mu(), self.channel, _SAWG_DUC_MAX, limit)
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delay_mu(self._rtio_interval)
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@kernel
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@kernel
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def set_duc_min_mu(self, limit: TInt32):
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def set_duc_min_mu(self, limit: TInt32):
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""".. seealso:: :meth:`set_duc_max_mu`"""
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""".. seealso:: :meth:`set_duc_max_mu`"""
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rtio_output(now_mu(), self.channel, _SAWG_DUC_MIN, limit)
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rtio_output(now_mu(), self.channel, _SAWG_DUC_MIN, limit)
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delay_mu(self._rtio_interval)
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@kernel
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@kernel
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def set_out_max_mu(self, limit: TInt32):
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def set_out_max_mu(self, limit: TInt32):
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""".. seealso:: :meth:`set_duc_max_mu`"""
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""".. seealso:: :meth:`set_duc_max_mu`"""
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rtio_output(now_mu(), self.channel, _SAWG_OUT_MAX, limit)
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rtio_output(now_mu(), self.channel, _SAWG_OUT_MAX, limit)
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delay_mu(self._rtio_interval)
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@kernel
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@kernel
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def set_out_min_mu(self, limit: TInt32):
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def set_out_min_mu(self, limit: TInt32):
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""".. seealso:: :meth:`set_duc_max_mu`"""
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""".. seealso:: :meth:`set_duc_max_mu`"""
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rtio_output(now_mu(), self.channel, _SAWG_OUT_MIN, limit)
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rtio_output(now_mu(), self.channel, _SAWG_OUT_MIN, limit)
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delay_mu(self._rtio_interval)
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@kernel
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@kernel
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def set_duc_max(self, limit: TFloat):
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def set_duc_max(self, limit: TFloat):
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@ -321,19 +335,12 @@ class SAWG:
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seven writes to the configuration channel.
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seven writes to the configuration channel.
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"""
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"""
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self.config.set_div(0, 0)
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self.config.set_div(0, 0)
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delay_mu(self.config._rtio_interval)
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self.config.set_clr(1, 1, 1)
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self.config.set_clr(1, 1, 1)
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delay_mu(self.config._rtio_interval)
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self.config.set_iq_en(1, 0)
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self.config.set_iq_en(1, 0)
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delay_mu(self.config._rtio_interval)
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self.config.set_duc_min(-1.)
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self.config.set_duc_min(-1.)
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delay_mu(self.config._rtio_interval)
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self.config.set_duc_max(1.)
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self.config.set_duc_max(1.)
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delay_mu(self.config._rtio_interval)
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self.config.set_out_min(-1.)
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self.config.set_out_min(-1.)
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delay_mu(self.config._rtio_interval)
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self.config.set_out_max(1.)
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self.config.set_out_max(1.)
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delay_mu(self.config._rtio_interval)
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self.frequency0.set_mu(0)
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self.frequency0.set_mu(0)
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self.frequency1.set_mu(0)
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self.frequency1.set_mu(0)
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self.frequency2.set_mu(0)
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self.frequency2.set_mu(0)
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