forked from M-Labs/artiq
1
0
Fork 0

rtio: support direct 64-bit now CSR in KernelInitiator

This commit is contained in:
Sebastien Bourdeauducq 2020-04-26 16:04:32 +08:00
parent 251a0101a6
commit 3a7819704a
1 changed files with 20 additions and 14 deletions

View File

@ -60,8 +60,11 @@ class Interface(Record):
class KernelInitiator(Module, AutoCSR): class KernelInitiator(Module, AutoCSR):
def __init__(self, tsc, cri=None): def __init__(self, tsc, cri=None, now64=False):
self.target = CSRStorage(32) self.target = CSRStorage(32)
if now64:
self.now = CSRStorage(64)
else:
# not using CSRStorage atomic_write feature here to make storage reset_less # not using CSRStorage atomic_write feature here to make storage reset_less
self.now_hi = CSR(32) self.now_hi = CSR(32)
self.now_lo = CSR(32) self.now_lo = CSR(32)
@ -87,8 +90,11 @@ class KernelInitiator(Module, AutoCSR):
# # # # # #
now_hi_backing = Signal(32) if now64:
now = self.now.storage
else:
now = Signal(64, reset_less=True) now = Signal(64, reset_less=True)
now_hi_backing = Signal(32)
self.sync += [ self.sync += [
If(self.now_hi.re, now_hi_backing.eq(self.now_hi.r)), If(self.now_hi.re, now_hi_backing.eq(self.now_hi.r)),
If(self.now_lo.re, now.eq(Cat(self.now_lo.r, now_hi_backing))) If(self.now_lo.re, now.eq(Cat(self.now_lo.r, now_hi_backing)))