From 30e7765a2ec194015757a800c53aa4c3ac7e4847 Mon Sep 17 00:00:00 2001
From: Sebastien Bourdeauducq <sb@m-labs.hk>
Date: Sat, 16 Sep 2017 14:36:27 +0800
Subject: [PATCH] drtio: add missing import

---
 artiq/gateware/drtio/rt_controller_master.py | 1 +
 1 file changed, 1 insertion(+)

diff --git a/artiq/gateware/drtio/rt_controller_master.py b/artiq/gateware/drtio/rt_controller_master.py
index 0522e68e2..b7ecfd5a3 100644
--- a/artiq/gateware/drtio/rt_controller_master.py
+++ b/artiq/gateware/drtio/rt_controller_master.py
@@ -7,6 +7,7 @@ from migen.genlib.resetsync import AsyncResetSynchronizer
 
 from misoc.interconnect.csr import *
 
+from artiq.gateware.rtio.cdc import GrayCodeTransfer
 from artiq.gateware.rtio import cri