From 2b01aa22b63dee6902cb5d4075d5ccde5800cb66 Mon Sep 17 00:00:00 2001
From: Sebastien Bourdeauducq <sb@m-labs.hk>
Date: Sun, 17 Dec 2017 00:24:54 +0800
Subject: [PATCH] sayma: set up Si5324 for RGMII clock rerouting

---
 artiq/firmware/runtime/lib.rs                 | 23 +++++++++++++++++++
 .../gateware/targets/sayma_amc_standalone.py  |  9 ++++++++
 2 files changed, 32 insertions(+)

diff --git a/artiq/firmware/runtime/lib.rs b/artiq/firmware/runtime/lib.rs
index 9f2eb79e4..0bd6e760f 100644
--- a/artiq/firmware/runtime/lib.rs
+++ b/artiq/firmware/runtime/lib.rs
@@ -82,6 +82,8 @@ fn startup() {
     #[cfg(has_ad9154)]
     board::ad9154::init().expect("cannot initialize AD9154");
 
+    #[cfg(rgmii_clock_rerouted)]
+    setup_rgmii_si5324();
     #[cfg(has_ethmac)]
     startup_ethernet();
     #[cfg(not(has_ethmac))]
@@ -91,6 +93,27 @@ fn startup() {
     }
 }
 
+#[cfg(rgmii_clock_rerouted)]
+fn setup_rgmii_si5324()
+{
+    const SI5324_SETTINGS: board::si5324::FrequencySettings
+            = board::si5324::FrequencySettings {
+        n1_hs  : 5,
+        nc1_ls : 8,
+        n2_hs  : 7,
+        n2_ls  : 360,
+        n31    : 63,
+        n32    : 63,
+        bwsel  : 4
+    };
+    info!("rerouting RGMII clock through Si5324");
+    unsafe { board::csr::ethphy::crg_reset_write(1); }
+    board::i2c::init();
+    board::si5324::setup(&SI5324_SETTINGS).expect("cannot initialize Si5324");
+    board::si5324::select_ext_input(true).expect("failed to select Si5324 input");
+    unsafe { board::csr::ethphy::crg_reset_write(0); }
+}
+
 #[cfg(has_ethmac)]
 fn startup_ethernet() {
     let hardware_addr;
diff --git a/artiq/gateware/targets/sayma_amc_standalone.py b/artiq/gateware/targets/sayma_amc_standalone.py
index d4a985a92..e91a8317e 100755
--- a/artiq/gateware/targets/sayma_amc_standalone.py
+++ b/artiq/gateware/targets/sayma_amc_standalone.py
@@ -140,6 +140,15 @@ class SaymaAMCStandalone(MiniSoC, AMPSoC):
             serial_rtm.tx.eq(serial_1.rx)
         ]
 
+        # Si5324 used to work around RGMII clock routing issue on first PCB revision
+        self.submodules.si5324_rst_n = gpio.GPIOOut(platform.request("si5324").rst_n)
+        self.csr_devices.append("si5324_rst_n")
+        i2c = self.platform.request("i2c")
+        self.submodules.i2c = gpio.GPIOTristate([i2c.scl, i2c.sda])
+        self.csr_devices.append("i2c")
+        self.config["I2C_BUS_COUNT"] = 1
+        self.config["HAS_SI5324"] = None
+
         # AMC/RTM serwb
         serwb_pll = serwb.phy.SERWBPLL(125e6, 1.25e9, vco_div=2)
         self.comb += serwb_pll.refclk.eq(self.crg.cd_sys.clk)