From 261870bdee18c46b1ae1b1a61370aec2ef972efa Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Robert=20J=C3=B6rdens?= <rj@quartiq.de>
Date: Tue, 19 Jan 2021 16:56:45 +0100
Subject: [PATCH] phaser: fix oscillator rtio address for even base addresses

close #1580
---
 artiq/coredevice/phaser.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/artiq/coredevice/phaser.py b/artiq/coredevice/phaser.py
index ab00d7f1a..78a3605ea 100644
--- a/artiq/coredevice/phaser.py
+++ b/artiq/coredevice/phaser.py
@@ -928,7 +928,7 @@ class PhaserOscillator:
         :param clr: Clear the phase accumulator (persistent)
         """
         data = (asf & 0x7fff) | ((clr & 1) << 15) | (pow << 16)
-        rtio_output(self.base_addr | (1 << 8), data)
+        rtio_output(self.base_addr + (1 << 8), data)
 
     @kernel
     def set_amplitude_phase(self, amplitude, phase=0., clr=0):