From 1be9e7576de6491f11de79a06f903afbd7118ffe Mon Sep 17 00:00:00 2001
From: whitequark <whitequark@whitequark.org>
Date: Sun, 10 Jan 2016 18:31:35 +0000
Subject: [PATCH] transforms.llvm_ir_generator: use byval for FFI calls where
 appropriate.

---
 artiq/compiler/transforms/llvm_ir_generator.py | 17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)

diff --git a/artiq/compiler/transforms/llvm_ir_generator.py b/artiq/compiler/transforms/llvm_ir_generator.py
index a507ffbcc..c86118c45 100644
--- a/artiq/compiler/transforms/llvm_ir_generator.py
+++ b/artiq/compiler/transforms/llvm_ir_generator.py
@@ -936,7 +936,18 @@ class LLVMIRGenerator:
         return llfun, [llenv] + list(llargs)
 
     def _prepare_ffi_call(self, insn):
-        llargs    = [self.map(arg) for arg in insn.arguments()]
+        llargs = []
+        byvals = []
+        for i, arg in enumerate(insn.arguments()):
+            llarg = self.map(arg)
+            if isinstance(llarg.type, (ll.LiteralStructType, ll.IdentifiedStructType)):
+                llslot = self.llbuilder.alloca(llarg.type)
+                self.llbuilder.store(llarg, llslot)
+                llargs.append(llslot)
+                byvals.append(i)
+            else:
+                llargs.append(llarg)
+
         llfunname = insn.target_function().type.name
         llfun     = self.llmodule.get_global(llfunname)
         if llfun is None:
@@ -951,6 +962,10 @@ class LLVMIRGenerator:
                                 insn.target_function().type.name)
             if self.needs_sret(llretty):
                 llfun.args[0].add_attribute('sret')
+                byvals = [i + 1 for i in byvals]
+            for i in byvals:
+                llfun.args[i].add_attribute('byval')
+
         return llfun, list(llargs)
 
     # See session.c:{send,receive}_rpc_value and comm_generic.py:_{send,receive}_rpc_value.