forked from M-Labs/artiq
coredevice: put cache into separate file/device
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@ -0,0 +1,45 @@
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from artiq.language.core import *
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from artiq.language.types import *
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@syscall
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def cache_get(key: TStr) -> TList(TInt32):
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raise NotImplementedError("syscall not simulated")
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@syscall
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def cache_put(key: TStr, value: TList(TInt32)) -> TNone:
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raise NotImplementedError("syscall not simulated")
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class CoreCache:
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"""Core device cache access"""
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def __init__(self, dmgr, core_device="core"):
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self.core = dmgr.get(core_device)
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@kernel
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def get(self, key):
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"""Extract a value from the core device cache.
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After a value is extracted, it cannot be replaced with another value using
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:meth:`put` until all kernel functions finish executing; attempting
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to replace it will result in a :class:`artiq.coredevice.exceptions.CacheError`.
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If the cache does not contain any value associated with ``key``, an empty list
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is returned.
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The value is not copied, so mutating it will change what's stored in the cache.
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:param str key: cache key
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:return: a list of 32-bit integers
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"""
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return cache_get(key)
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@kernel
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def put(self, key, value):
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"""Put a value into the core device cache. The value will persist until reboot.
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To remove a value from the cache, call :meth:`put` with an empty list.
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:param str key: cache key
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:param list value: a list of 32-bit integers
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"""
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cache_put(key, value)
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@ -41,14 +41,6 @@ class CompileError(Exception):
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def rtio_get_counter() -> TInt64:
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raise NotImplementedError("syscall not simulated")
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@syscall
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def cache_get(key: TStr) -> TList(TInt32):
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raise NotImplementedError("syscall not simulated")
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@syscall
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def cache_put(key: TStr, value: TList(TInt32)) -> TNone:
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raise NotImplementedError("syscall not simulated")
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class Core:
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"""Core device driver.
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@ -127,31 +119,3 @@ class Core:
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min_now = rtio_get_counter() + 125000
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if now_mu() < min_now:
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at_mu(min_now)
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@kernel
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def get_cache(self, key):
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"""Extract a value from the core device cache.
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After a value is extracted, it cannot be replaced with another value using
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:meth:`put_cache` until all kernel functions finish executing; attempting
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to replace it will result in a :class:`artiq.coredevice.exceptions.CacheError`.
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If the cache does not contain any value associated with ``key``, an empty list
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is returned.
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The value is not copied, so mutating it will change what's stored in the cache.
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:param str key: cache key
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:return: a list of 32-bit integers
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"""
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return cache_get(key)
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@kernel
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def put_cache(self, key, value):
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"""Put a value into the core device cache. The value will persist until reboot.
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To remove a value from the cache, call :meth:`put_cache` with an empty list.
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:param str key: cache key
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:param list value: a list of 32-bit integers
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"""
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cache_put(key, value)
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@ -5,21 +5,22 @@ from artiq.test.hardware_testbench import ExperimentCase
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class _Cache(EnvExperiment):
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def build(self):
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self.setattr_device("core")
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self.print = lambda x: print(x)
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self.setattr_device("core_cache")
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@kernel
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def get(self, key):
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return self.core.get_cache(key)
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return self.core_cache.get(key)
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@kernel
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def put(self, key, value):
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self.core.put_cache(key, value)
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self.core_cache.put(key, value)
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@kernel
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def get_put(self, key, value):
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self.get(key)
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self.put(key, value)
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class CacheTest(ExperimentCase):
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def test_get_empty(self):
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exp = self.create(_Cache)
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@ -42,6 +42,12 @@ These drivers are for the core device and the peripherals closely integrated int
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.. automodule:: artiq.coredevice.i2c
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:members:
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:mod:`artiq.coredevice.cache` module
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-----------------------------------------
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.. automodule:: artiq.coredevice.cache
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:members:
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:mod:`artiq.coredevice.exceptions` module
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-----------------------------------------
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@ -1,5 +1,6 @@
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# This is an example device database that needs to be adapted to your setup.
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# The RTIO channel numbers here are for NIST CLOCK on KC705.
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# The list of devices here is not exhaustive.
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{
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"comm": {
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@ -14,6 +15,11 @@
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"class": "Core",
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"arguments": {"ref_period": 1e-9}
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},
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"core_cache": {
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"type": "local",
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"module": "artiq.coredevice.cache",
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"class": "CoreCache"
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},
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"core_dds": {
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"type": "local",
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"module": "artiq.coredevice.dds",
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