diff --git a/soc/targets/artiq_kc705.py b/soc/targets/artiq_kc705.py
index 5ed077b5c..f2ec5f0f3 100644
--- a/soc/targets/artiq_kc705.py
+++ b/soc/targets/artiq_kc705.py
@@ -129,7 +129,7 @@ class NIST_QC2(_NIST_QCx):
         for i in range(16):
             if i == 14:
                 # TTL14 is for the clock generator
-                break
+                continue
             if i % 4 == 3:
                 phy = ttl_simple.Inout(platform.request("ttl", i))
                 self.submodules += phy