forked from M-Labs/artiq
commit
0a43815956
@ -155,6 +155,8 @@ class SPIMaster:
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by one RTIO clock cycle.
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:param read_div: Ditto for the read clock.
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"""
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if write_div > 257 or write_div < 2 or read_div > 257 or read_div < 2:
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raise ValueError('Divider values out of range')
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rtio_output(now_mu(), self.channel, SPI_CONFIG_ADDR, flags |
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((write_div - 2) << 16) | ((read_div - 2) << 24))
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self.write_period_mu = int(write_div*self.ref_period_mu)
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