forked from M-Labs/artiq
soc/runtime: fix DDS programming
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b2bb837d22
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06cc9302f8
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@ -146,27 +146,27 @@ static void rtio_sync(int channel)
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while(rtio_o_level_read() != 0);
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while(rtio_o_level_read() != 0);
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}
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}
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#define DDS_FTW 0x0a
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#define DDS_FTW0 0x0a
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#define DDS_PTW 0x0e
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#define DDS_FTW1 0x0b
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#define DDS_FTW2 0x0c
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#define DDS_FTW3 0x0d
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#define DDS_FUD 0x40
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#define DDS_FUD 0x40
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#define DDS_GPIO 0x41
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#define DDS_GPIO 0x41
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#define DDS_WRITE1(addr, data) \
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#define DDS_READ(addr) \
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MMPTR(0xb0000000 + (addr)*4)
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#define DDS_WRITE(addr, data) \
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MMPTR(0xb0000000 + (addr)*4) = data
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MMPTR(0xb0000000 + (addr)*4) = data
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#define DDS_WRITE2(addr, data) \
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DDS_WRITE1(addr, (data) >> 8); \
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DDS_WRITE1((addr) + 1, data)
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#define DDS_WRITE4(addr, data) \
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DDS_WRITE2(addr, (data) >> 16); \
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DDS_WRITE2((addr) + 2, data)
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static void dds_program(int channel, int ftw)
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static void dds_program(int channel, int ftw)
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{
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{
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DDS_WRITE1(DDS_GPIO, channel);
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DDS_WRITE(DDS_GPIO, channel);
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DDS_WRITE4(DDS_FTW, ftw);
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DDS_WRITE(DDS_FTW0, ftw & 0xff);
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DDS_WRITE1(DDS_FUD, 0);
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DDS_WRITE(DDS_FTW1, (ftw >> 8) & 0xff);
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DDS_WRITE(DDS_FTW2, (ftw >> 16) & 0xff);
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DDS_WRITE(DDS_FTW3, (ftw >> 24) & 0xff);
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DDS_WRITE(DDS_FUD, 0);
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}
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}
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static const struct symbol syscalls[] = {
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static const struct symbol syscalls[] = {
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@ -178,6 +178,22 @@ static const struct symbol syscalls[] = {
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{NULL, NULL}
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{NULL, NULL}
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};
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};
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static void dds_init(void)
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{
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int i;
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DDS_WRITE(DDS_GPIO, 1 << 7);
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for(i=0;i<8;i++) {
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DDS_WRITE(DDS_GPIO, i);
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DDS_WRITE(0x00, 0x78);
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DDS_WRITE(0x01, 0x00);
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DDS_WRITE(0x02, 0x00);
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DDS_WRITE(0x03, 0x00);
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DDS_WRITE(DDS_FUD, 0);
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}
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}
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typedef void (*kernel_function)(void);
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typedef void (*kernel_function)(void);
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int main(void)
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int main(void)
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@ -198,6 +214,7 @@ int main(void)
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if(length > 0) {
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if(length > 0) {
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if(load_elf(syscalls, kbuf, length, kcode, sizeof(kcode))) {
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if(load_elf(syscalls, kbuf, length, kcode, sizeof(kcode))) {
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flush_cpu_icache();
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flush_cpu_icache();
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dds_init();
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rtio_reset_write(0);
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rtio_reset_write(0);
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k();
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k();
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rtio_reset_write(1);
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rtio_reset_write(1);
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