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ENC424J600
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base: occheung:master
Branches Tags
occheung:master
occheung:feature/nal
occheung:smoltcp-bump
occheung:nal_support
occheung:feature/booster
renet:master
renet:fix-spi-clk
renet:fix-visibility
renet:fix-spi
renet:fix-nal
renet:fix-cargo
..
compare: occheung:feature/booster
Branches Tags
occheung:feature/nal
occheung:smoltcp-bump
occheung:nal_support
occheung:feature/booster
occheung:master
renet:master
renet:fix-spi-clk
renet:fix-visibility
renet:fix-spi
renet:fix-nal
renet:fix-cargo

4 Commits
master ... feature/bo

Author SHA1 Message Date
occheung 9d3d73479a spi: add delay margin 2021-01-18 14:35:17 +08:00
occheung bcb3eef8cd lib: derive debug for error for unwrapping 2021-01-18 14:00:37 +08:00
occheung 500c855d00 spi: add CS delay to accomodate booster 2021-01-18 13:59:39 +08:00
occheung 1a2c22cfb2 lib: reduce stack usage 2021-01-18 13:58:07 +08:00
2 changed files with 3 additions and 4 deletions
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3
Cargo.toml
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@ -5,9 +5,8 @@ description = "Embbeded Rust Ethernet driver for ENC424J600 Ethernet controller
authors = ["Harry Ho <hh@m-labs.hk>"] authors = ["Harry Ho <hh@m-labs.hk>"]
version = "0.1.0" version = "0.1.0"
keywords = ["ethernet", "eth", "enc424j600", "stm32", "stm32f4xx"] keywords = ["ethernet", "eth", "enc424j600", "stm32", "stm32f4xx"]
repository = "https://git.m-labs.hk/M-Labs/ENC424J600" repository = "https://github.com/smoltcp-rs/ENC424J600"
edition = "2018" edition = "2018"
license = "BSD-2-Clause"
[dependencies] [dependencies]
volatile-register = "0.2" volatile-register = "0.2"

4
src/spi.rs
View File

@ -133,7 +133,7 @@ impl <SPI: Transfer<u8>,
// Disable chip select // Disable chip select
cortex_m::asm::delay(10_u32); cortex_m::asm::delay(10_u32);
self.nss.set_high(); self.nss.set_high();
cortex_m::asm::delay(4_u32); cortex_m::asm::delay(5_u32);
Ok(buf[2]) Ok(buf[2])
}, },
// TODO: Maybe too naive? // TODO: Maybe too naive?
@ -141,7 +141,7 @@ impl <SPI: Transfer<u8>,
// Disable chip select // Disable chip select
cortex_m::asm::delay(10_u32); cortex_m::asm::delay(10_u32);
self.nss.set_high(); self.nss.set_high();
cortex_m::asm::delay(4_u32); cortex_m::asm::delay(5_u32);
Err(SpiPortError::TransferError) Err(SpiPortError::TransferError)
} }
} }